Features: ` Highest Performance Floating-Point Digital Signal Processor (DSP) TMS320C44-60: 33-ns Instruction Cycle Time, 330 MOPS, 60 MFLOPS, 30 MIPS, 336M Bytes/s TMS320C44-50: 40-ns Instruction Cycle Time` Four Communication Ports` Six-Channel Direct Memory Address (DMA) Coprocessor` Single-C...
TMS320C44: Features: ` Highest Performance Floating-Point Digital Signal Processor (DSP) TMS320C44-60: 33-ns Instruction Cycle Time, 330 MOPS, 60 MFLOPS, 30 MIPS, 336M Bytes/s TMS320C44-50: 40-ns Instruction...
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` Highest Performance Floating-Point Digital Signal Processor (DSP)
TMS320C44-60: 33-ns Instruction Cycle Time, 330 MOPS, 60 MFLOPS, 30 MIPS, 336M Bytes/s
TMS320C44-50: 40-ns Instruction Cycle Time
` Four Communication Ports
` Six-Channel Direct Memory Address (DMA) Coprocessor
` Single-Cycle Conversion to and From IEEE-754 Floating-Point Format
` Single Cycle, 1/x, 1//x
` Source-Code Compatible With '320C3x and '320C4x
` Single-Cycle 40-Bit Floating-Point, 32-Bit Integer Multipliers
` Twelve 40-Bit Registers, Eight Auxiliary Registers, 14 Control Registers, and Two Timers
` IEEE-1149.1† (JTAG) Boundary-Scan Compatible
` Two Identical External Data and Address Buses Supporting Shared Memory Systems and High Data-Rate,Single-Cycle Transfers
High Port-Data Rate of 120M Bytes/s (TMS320C44-60) (Each Bus)
128M-Byte Program/Data/Peripheral Address Space
Memory-Access Request for Fast, Intelligent Bus Arbitration
Separate Address-Bus, Data-Bus, and Control-Enable Pins
Four Sets of Memory-Control Signals Support Different Speed Memories in Hardware
` 304-Pin Plastic Quad Flatpack (PDB Suffix)
` Fabricated Using 0.72-mm Enhanced Performance Implanted CMOS (EPICE) Technology by Texas Instruments (TIE)
` Separate Internal Program-, Data-, and DMA-Coprocessor Buses for Support of Massive Concurrent I/O of Program and Data, Thereby Maximizing Sustained CPU Performance
` IDLE2 Clock-Stop Power-Down Mode
` Communication-Port-Direction Pin
` On-Chip Program Cache and Dual-Access/Single-Cycle RAM for Increased Memory-Access Performance
512-Byte Instruction Cache
8K Bytes of Single-Cycle Dual-Access Program or Data RAM
ROM-Based Boot Loader Supports Program Bootup Using 8-, 16-, or 32-Bit Memories or One of the ommunication Ports
` Software-Communication-Port Reset
` NMI With Bus-Grant Feature
absolute maximum ratings over specified temperature range (unless otherwise noted)†
Supply voltage range, VDD (see Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V
Input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V
Output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V
Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 85
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 to 150
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 5: All voltage values are with respect to VSS.
The TMS320C44 DSP is a 32-bit, floating-point processor manufactured in 0.72-mm double-level-metal CMOS technology. The TMS320C44 is part of the TMS320C4x generation of DSPs from Texas Instruments. The on-chip parallel-processing capabilities of the 'C44 make the immense floating-point performance required by many applications achievable.