TMPR28051 STS-1

Features:

Maps signals in one of the following ways:
- Maps up to 28 asynchronous DS1 signals to SONET STS-1 via VT Groups, or SDH AU-3 via TUG-2.
- Maps up to 21 asynchronous E1 signals to SDH AU-3 via TUG-2, or SONET STS-1 via VT Groups.
- Maps any valid combination of DS1/E1 signals at the VT Group/TUG-2 level.
PLL-free receive operation using built-in digital jitter attenuators.
High-speed microprocessor interface configurable to operate with most commercial microprocessors.
Inserts valid B1, B2, and B3 bit interleaved parity (BIP) in the transmit direction.
Detects and counts B1, B2, and B3 BIP-8 errors on either a bit or block basis for performance monitoring in the receive direction.
Detects and counts V5 BIP-2 errors on either a bit or block basis for performance monitoring.
Configurable continuous B1, B2, B3, and V5 BIP-2 error insertion.
Configurable remote error indication (REI) insertion for B2, B3, and V5 BIP-2 errors.
Detects and counts remote errors.
Built-in test pattern insertion and drop for setup and maintenance.
Configurable VT1.5/TU-11 slot selection for DS1 insertion and drop.
Configurable VT2/TU-12 slot selection for E1 insertion and drop.
Detects STS-1 path loss of pointer (LOP-P), loss of H4 multiframe (H4LOMF), path alarm indication signal (AIS-P), and path remote defect indication (RDI-P).
Automatic receive monitor functions include VT/TU remote defect indication (RDI-V), VT/TU remote error indication (REI-V), BIP-2 errors, VT/TU AIS (AIS-V), and VT/TU loss of pointer (LOP-V).
Automatic receive monitoring functions can be configured to provide an interrupt to the control system, or the device can be operated in a polled mode.
User configurable for VT/TU label, AIS-V, RDI-V, REI-V, force BIP-2 errors, or unequipped tributary insertion.
Typical 3.3 V operation with 5 V TTL tolerant I/O and boundary scan.
40 °C to +85 °C temperature range.
208-pin shrink quad flat pack (SQFP) package.
Provides alarm and control features to easily implement the latest release of the following standards: GR253-CORE (12/97 with the exception of GR-253 section 6.2.1.1.8.C), G.707 (3/96), G.783 (1/94), G.823.393, T1.105-1995,
T1.105.02-1995, T1.105.03-1994,
T1.105.03A-1995, T1.105.07-1996,
T1.105.09-1996, ETS300.147 (1/95),
ETS300.417-1-1 (1/96).

Pinout




Description

The Lucent Technologies Microelectronics Group TMPR28051 device is designed to map any valid combination of DS1 and E1 signals into a stream at a rate of 51.84 Mbits/s. This TMPR28051 STS-1  provides all of the functions necessary to insert and drop any valid combination up to 28 asynchronous DS1 signals or 21 asynchronous E1 signals into an SPE.