Features: Complete Discrete Multitone (DMT)-Based Asymmetric Digital Subscriber Line (ADSL) Coder/Decoder (Codec) Solution
Complies With ANSI T1.413, Issue 2 and ITU G.992.1
Supports up to 8-Mbit/s Downstream and 800-kbit/s Upstream Duplex
Integrated 14-Bit Converter for Transmitter/Receiver
Integrated Transmit/Receive (TX/RX) Channel Filters
Integrated TX/RX Attenuation/Gain
Integrated Reference
High-Speed Parallel Interface
2s-Complement Data Format
Selectable 2.2-MSPS or 4.4-MSPS Parallel Data Transfer Rate
Serial Configuration Port Eight General-Purpose (GP) Output Terminals
Supports Multiple-Channel Configuration
Single 3.3-V Supply
Hardware/Software Power Down
40°C to 85°C Operation
Packaged in 100-Pin Plastic Quad Flatpack
Pinout
SpecificationsSupply voltage range, AVDD to AGND, DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 4.5 V
Analog input voltage range to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.3 V to AVDD + 0.3 V
Digital input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to DVDD+ 0.3 V
Operating virtual-junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 to 150
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 to 85
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65to 150
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260DescriptionThe TLV320AD12A is a high-speed coder/decoder (codec) for central office-side (CO) discrete-multitone (DMT)asymmetric-digital subscriber line (ADSL) access that supports ANSI Std T1.413, Issue 2 and ITU G.992.1. The codec is a low-power device comprised of five major functional blocks: transmitter (TX), receiver (RX), clock,reference, and host interface.
The transmit channel consists of a 25.875-kHz to 1.104-MHz digital band-pass filter of the TLV320AD12A, a 14-bit, 8.832-MSPS DAC,a 1.104-MHz analog low-pass filter, and a transmit attenuator. The receiver channel consists of a two programmable-gain-amplifier stages (PGA), a 138-kHz analog low-pass filter, a 14-bit, 4.416-MSPS ADC, a 138-kHz digital low-pass filter. An onboard reference circuit generates 1.5-V reference voltage for the converters.
The codec has two interface ports: a parallel port for data transfer, and a serial port for control. The parallel port is 16 bits wide, and is reserved for moving data between the codec and a DSP, such as the TMS320C6XX. Configuration is done via the serial port. A special interface scheme enables multichannel system design. The TLV320AD12A can be powered down via a dedicated terminal or through software control to reduce heat dissipation. Additionally, there is a general-purpose (GP) port consisting of eight output terminals for control of external circuitry.
TLV320AD12A Data Sheet
