Features: Single wire LIN transceiverCompatible to LIN Protocol Specification, Rev. 1.1Compatible to ISO9141 functionsControl Output for voltage regulatorUp to 20 kbps bus speedLow RFI due to slew rate controlFully integrated receiver filterProtection against load dump, jump startBus terminals pro...
TH8082: Features: Single wire LIN transceiverCompatible to LIN Protocol Specification, Rev. 1.1Compatible to ISO9141 functionsControl Output for voltage regulatorUp to 20 kbps bus speedLow RFI due to slew r...
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Single wire LIN transceiver
Compatible to LIN Protocol Specification, Rev. 1.1
Compatible to ISO9141 functions
Control Output for voltage regulator
Up to 20 kbps bus speed
Low RFI due to slew rate control
Fully integrated receiver filter
Protection against load dump, jump start
Bus terminals proof against short-circuits and transients in the automotive environment
Very low (25 A) typical power consumption in sleep mode
Thermal overload and short circuit protection
High impendance Bus pin in case of loss of ground and undervoltage condition
± 4kV ESD protection on bus pin
Parameter | Symbol | Conditions | Min. | Max. | Unit |
Batterry Supply Voltage | VS | t < 1 min | -0.3 | +30 | V |
Supply Voltage | VCC | -0.3 | +7 | V | |
Short-term supply voltage | VS.ld | Load dump; t<500ms | +40 | V | |
Transient supply voltage | VS.tr1 | ISO 7637/1 pulse 1[1] | -150 | V | |
Transient supply voltage | VS.tr2 | ISO 7637/1 pulses 2[1] | +100 | V | |
Transient supply voltage | VS.tr3 | ISO 7637/1 pulses 3A, 3B | -150 | +150 | V |
BUS voltage | VBUS | t < 500 ms, VS = 20 V VS = 20 V |
-20 -40 |
+40 | V |
Transient bus voltage | VBUS.tr1 | ISO 7637/1 pulse 1 [2] | -150 | V | |
Transient bus voltage | VBUS.tr2 | ISO 7637/1 pulses 2 [2] | +100 | V | |
Transient bus voltage | VBUS.tr3 | ISO 7637/1 pulses 3A, 3B [2] | -150 | +150 | V |
DC voltage on pins TxD, RxD | VDC | -0.3 | +7 | V | |
ESD capability of pin BUS | ESDBUSHB | Human body model, equivalent | -4 | +4 | kV |
ESD capability of any other pins | ESDHB | Human body model, equivalent | -2 | +2 | kV |
Maximum latch up free current at any Pin | ILATCH | -500 | +500 | mA | |
Maximum power dissipation | Ptot | At Tamb = +125 °C | 197 | mW | |
Thermal impedance | JA | in free air | 152 | K/W | |
Storage temperature | Tstg | -55 | +150 | °C | |
Junction temperature | Tvj | -40 | +150 | °C |
The TH8082 is a physical layer device for a single wire data link capable of operating in applications where high data rate is not required and a lower data rate can achieve cost reductions in both the physical media components and in the microprocessor which use the network.The TH8082 is designed in accordance to the physical layer definition of the LIN Protocol Specification, Rev. 1.2 . The IC furthermore can be used in ISO9141 systems.
Because of the very low current consumption of the TH8082 in the recessive state it's particularly suitable for ECU applications with hard standby current requirements.An advanced sleep mode capability allows a shutdown of the whole application . The included wake-up function detects incoming dominant bus messages and enables the voltage regulator.