TFB2022AI

PinoutSpecificationsSupply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 VInput voltage range, VI (at any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 VOutput voltage range, VO . . . . . . . . . . . . ....

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TFB2022AI Picture
SeekIC No. : 004517973 Detail

TFB2022AI: PinoutSpecificationsSupply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 VInput voltage range, VI (at any input) . . . . . . . . . . . . . ....

floor Price/Ceiling Price

Part Number:
TFB2022AI
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/1/12

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Product Details

Description



Pinout

  Connection Diagram


Specifications

Supply voltage range, VCC (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Input voltage range, VI (at any input)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Continuous total dissipation  . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .See Dissipation Rating Table
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 W
Operating free-air temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . .20°C to 85°C
Storage temperature range  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . .65°C to 150°C
Case temperature for 10 seconds  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . .260°C
NOTE 1: All voltage values are with respect to GND.



Description

The TFB2022AI data path unit (DPU) is a member of the Texas Instruments Futurebus+ (FB+) chip set. This chip set provides an integrated approach to the Futurebus+ interface that reduces new-product design time, allows more functionality per circuit board, improves overall interface reliability, and reduces end-user down time through built-in test capabilities. The Futurebus+ chip set is capable of supporting 32- or 64-bit data widths in any combination on both the host-bus interface (HIF) and Futurebus+. The address width is programmable to be 32 bits or 36 bits (with either data width).

The TFB2022AI may be used with a TFB2002B Futurebus+ I/O controller to provide a complete 64-bit Profile-B interface. It allows great flexibility in the design of the system and in the host features that may be supported. It may also be used with a user-defined controller to provide a variety of performance features. When used together, the TFB2022AI and TFB2002B provide the Futurebus+ and host-bus protocol control for the first 64 bits of data and 36 bits of address. The TFB2022AI contains a bidirectional FIFO for high-speed transmission of data in either compelled or packet mode, address control for 36 bits of address, and related CSR locations. All Profile-A- and Profile-B-required CSRs are implemented either on this device or the TFB2002B.

The TFB2022AI is optimized for Profile-B modules. Several processors may reside on a single module with the DPU as long as they do not require the DPU/IOC to understand cache-coherent operation. The module may contain memory or I/O units in addition to processors. The TFB2022AI is best suited for I/O or memory modules.

The MS<1:0> signals provide a preaddress decode mechanism, enabling the user to implement simplified decode logic in the logic interface. These signals indicate whether an access is being made to host memory, extended units space, host CSR space, or to a message mailbox.

The TFB2022AI is offered in a 240-pin metal quad flat package (MFP). The TFB2022AI is characterized for operation over the industrial temperature range of 20°C to 85°C.




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