TDA4454

Suitable for standard B/G, L and D2MAC, processes negative and positive modulated IF-signals with equal polarity of the output signal
High performance video demodulator with PLL picture carrier regeneration
Extended video bandwidth (12 MHz) for the demodulation of amplitude modulated MAC-signals
Standard B/G: AGC acting on the sync peak pulse
Standard L: fast AGC acting on peak white level with average value controlled capacitor discharge and reference hysteresis
D2MAC: fast AGC acting on peak level with controlled capacitor discharge
Output for delayed tuner-AGC, take over point adjustable
High input sensitivity
Ultra white and ultra black limiting
Supply voltage range 6.8 to 13 V
Low power consumption
 ESD protection

This multistandard video IF processing circuit TDA4454 with PLL picture carrier regeneration gives a high performance of linear video demodulation.

The TDA4454 IF signal is internally fed via a 3-stage controlled wideband amplifier to the video demodulator and the phase detector. The phase detector compares the phase of IF signal (0°) with the output signal of the VCO (90°) and sets the VCO frequency accordingly. A lock detector switches the PLL loop filter according to the state of the PLL (locked-PLL slow, unlocked-PLL fast).

A second output of the TDA4454 provides the reference carrier for the video demodulator. The polarity of the demodulator can be inverted by the standard switch (Pin 10), so that negative or positive modulated IF signals are always available with the same polarity at the demodulator output. The demodulated video signal is filtered, amplified and fed via an interference limiter to the video output (Pin 6).

The TDA4454 standard switch also determines the clamp level of the video amplifier and the required IF-AGC mode. In the standard B/G mode the sync peak value is the criterion for a fast charge and discharge. In the standard L mode on the other hand, fast AGC action is achieved by charging at peak white level and discharging by the averaged video signal (time constant on Pin 7). The response level for discharge has a hysteresis. In the D2MAC mode a similar function is applied to achieve the AGC, but with different threshold levels.

An overload detector prevents the PLL becoming unlocked by large IF input signals.
To achieve a delayed tuner-AGC action, the current output (Pin 3) of TDA4454 can be adjusted with a resistor at Pin 2.