TC7MET138AFK

Features:

• High speed: t_pd = 7.6 ns (typ.) (V_CC = 5 V)
• Low power dissipation: I_CC = 4 A (max) (Ta = 25°C)
• Compatible with TTL outputs: V_IL = 0.8 V (max) V_IH = 2.0 V (min)
• Power down protection is provided on all inputs and outputs.
• Balanced propagation delays: tpLH tpHL
• Pin and function compatible with the 74 series (74AC/HC/ALS/LS etc.) 138 type. Weight: 0.02 g (typ.)


Pinout




Specifications

SYMBOL	PARAMETER	RATING	UNIT
VCC	Supply voltage range	-0.5~7.0	V
VIN	DC input voltage	-0.5~7.0	V
IIK	Input diode current	-20	mA
VOUT	DC output voltage	−0.5~7.0 (Note 2) −0.5~VCC + 0.5 (Note 3)	V
IOK	Output diode current	±20	mA
IOUT	DC output current	±25	mA
ICC	DC VCC/ground current	±75	mA
PD	Power dissipation	180	mW
Tstg	Storage temperature range	65 to +150

Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Note 2: VCC = 0 V
Note 3: High or low state. IOUT absolute maximum rating must be observed.
Note 4: VOUT < GND, VOUT > VCC


Description

The TC7MET138AFK is an advanced high speed CMOS 3-to-8 line decoder fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent bipolar schottky TTL while maintaining the CMOS low power dissipation.

When the TC7MET138AFK is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs (Y0 - Y7) will go low. When enable input G1 is held low or either G2A or G2B is held high, decoding function is inhibited and all outputs go high. G1, G2A, and G2B inputs are provided to ease cascade connection and for use as an address decoder for memory systems. The input voltage are compatible with TTL output voltage.

The TC7MET138AFK  may be used as a level converter for interfacing 3.3 V to 5 V system.

Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents TC7MET138AFK destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc.