TC58NS256DC

• Organization Memory cell array 528 × 64K × 8 Register 528 × 8 Page size 528 bytes Block size (16K + 512) bytes
• Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read
• Mode control Serial input/output, Command control
• Complies with the SmartMedia^TM Electrical Specification and Data Format Specification issued by the SSFDC Forum
• Power supply V_CC = 3.3 V ± 0.3 V
• Access time Cell array-register 25 µs max Serial Read cycle 50 ns min
• Operating current Read (50-ns cycle) 10 mA typ. Program (avg.) 10 mA typ. Erase (avg.) 10 mA typ. Standby 100 µA max
• Package TC58NS256DC: FDC-22A (Weight: 1.8 g typ.)

The TC58NS256DC is a single 3.3-V 256-Mbit (276,824,064) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E²PROM) organized as 528 bytes × 32 pages × 2048 blocks. The TC58NS256DC has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes + 512 bytes: 528 bytes × 32 pages).

The TC58NS256DC is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. The Erase and Program operations are automatically executed.

The TC58NS256DC is a SmartMedia^TM with ID and each device has 128 bit unique ID number embedded in the device. This unique ID number is applicable to image files, music files, electronic books, and so on where copyright protection is required.

The data stored in the TC58NS256DC needs to comply with the data format standardized by the SSFDC Forum in order to maintain compatibility with other SmartMedia^TM systems.