TC500

Features:

• Precision (up to 17-bits) A/D Converter "Front End"
• 3-Pin Control Interface to Microprocessor
• Flexible: User Can Trade-off Conversion Speed for Resolution
• Single Supply Operation (TC510/TC514)
• 4 Input, Differential Analog MUX (TC514)
• Automatic Input Voltage Polarity Detection
• Low Power Dissipation:
- (TC500/TC500A): 10mΩ
- (TC510/TC514): 18mΩ
• Wide Analog Input Range: ±4.2V (TC500A/TC510)
• Directly Accepts Bipolar and Differential




Application

• Precision Analog Signal Processor
• Precision Sensor Interface
• High Accuracy DC Measurements




Pinout






Specifications

TC510/TC514 Positive Supply Voltage
(V_DD to GND) .........................................+10.5V
TC500/TC500A Supply Voltage
(V_DD to V_SS) ..................................................................+18V
TC500/TC500A Positive Supply Voltage
(V_DD to GND) .................................................................+12V
TC500/TC500A Negative Supply Voltage
(V_SS to GND)......................................................................-8V
Analog Input Voltage (V_IN+ or V_IN-) ..........................V_DD to V_SS
Logic Input Voltage..............................V_DD +0.3V to GND - 0.3V
Voltage on OSC:................ -0.3V to (V_DD +0.3V) for V_DD < 5.5V
Ambient Operating Temperature Range:................ 0 to +70
Storage Temperature Range:............................ -65 to +150

*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.

Parameter NameValueInput Voltage Range (V)Vss +1.5V to Vdd -1.5VSampling Rate4 to 10Programmable resolution/conversion timeYesInput RangeYesInput Channels1Charge pump (-V) output pinNoResolutionUp to 16 bitsSampling Rate (Conv/sec)4 to 10Interface3-wireSupply Voltage Min (V)±4.5Supply Voltage Max (V)±7.5

Parameter Name	Value
Input Voltage Range (V)	Vss +1.5V to Vdd -1.5V
Sampling Rate	4 to 10
Programmable resolution/conversion time	Yes
Input Range	Yes
Input Channels	1
Charge pump (-V) output pin	No
Resolution	Up to 16 bits
Sampling Rate (Conv/sec)	4 to 10
Interface	3-wire
Supply Voltage Min (V)	±4.5
Supply Voltage Max (V)	±7.5

Description

TheTC500/A/510/514 family are precision analog front ends that implement dual slope A/D converters having a maximum resolution of 17-bits plus sign. As a minimum, each device contains the integrator, zero crossing
comparator and processor interface logic. The TC500 is the base (16-bit max) device and requires both positive and negative power supplies. The TC500A is identical to the TC500 with the exception that it has improved linearity, allowing it to operate to a maximum resolution of 17-bits. The TC510 adds an onboard negative power supply converter for single supply operation. The TC514 adds both a negative power supply converter and a 4 input differential analog multiplexer.

Each device TC500 has the same processor control interface consisting of 3 wires: control inputs (A and B) and zerocrossing
comparator output (CMPTR). The processor manipulates A, B to sequence the TC5XX through four phases of conversion: Auto Zero, Integrate, De-integrate and Integrator Zero. During the Auto Zero phase, offset voltages in the TC5XX are corrected by a closed loop feedback mechanism. The input voltage of TC500  is applied to the integrator during the Integrate phase. This causes an integrator output dv/dt directly proportional to the magnitude of the input voltage. The higher the input voltage, the greater the magnitude of the voltage stored on the integrator during this phase. At the start of the De-integrate phase, an external voltage reference is applied to the integrator and, at the same time, the external host processor of TC500 starts its on-board timer. The processor maintains this state until a transition
occurs on the CMPTR output, at which time the processor halts its timer. The resulting timer count is the converted
analog data. Integrator Zero (the final phase of conversion) removes any residue remaining in the integrator in preparation for the next conversion.

The TC500/A/510/514 offer high resolution (up to 17- bits), superior 50Hz/60Hz noise rejection, low power operation, minimum I/O connections, low input bias currents and lower cost compared to other converter technologies having similar conversion speeds.

The TC500/500A/510/514 family are precision analog front ends that implement dual slope A/D converters having a maximum resolution of 17 bits plus sign.As a minimum, each device contains the integrator,zero crossing comparator and processor interface logic.The TC500 is the base (16 bit max)device and requires both positive and negative power supplies.The TC500A is identical to the TC500, except it has improved linearity allowing it to operate to a maximum resolution of 17 bits.The TC510 adds an onboard negative power supply converter for single supply operation.The TC514 adds both a negative power supply converter and a 4 input differential analog multiplexer. Each device has the same processor control interface consisting of 3 wires:control inputs A and B and zero-crossing comparator output (CMPTR).The processor manipulates A,B to sequence the TC5xx through four phases of conversion:Auto Zero,Integrate,Deintegrate and Integrator Zero.During the Auto Zero phase,offset voltages in the TC5xx are corrected by a closed-loop feedback mechanism.The input voltage is applied to the integrator during the Integrate phase.This causes an integrator output dv/dt directly proportional to the magnitude of the input voltage. The higher the input voltage,the greater the magnitude of the voltage stored on the integrator during this phase. At the start of the Deintegrate phase,an external voltage reference of TC500 is applied to the integrator,and at the same time,the external host processor starts its on-board timer.The processor maintains this state until a transition occurs on the CMPTR output,at which time the processor halts its timer. The resulting timer count of TC500  is the converted analog data.Integrator Zero (the final phase of conversion)removes any residue remaining in the integrator in preparation for the next conversion. The TC500/500A/510/514 offer high resolution (up to 17 bits)superior 50Hz/60Hz noise rejection,low power operation, minimum I/O connections, low input bias currents and lower cost compared to other converter technologies having similar conversion speeds.