T7904E

•Initialization of the Program Memory by DMA via the User Extension Interface (8-bit or 16-bit data format possible) or via the Synchronous Serial Input Link 1 (16-bit data format),
•SRAM and DRAM support
•Write access protection
•40-bit User Extension interface
•Automatic conversion to and from a 32-bit data User Extension Interface
•Powerful 16-bit programmable versatile IO port featuring 2 input/output serial ports, up to 16-bit input/output parallel port, 4 pulse generators, 2 full duplex UART
•Four External interrupts
•Two 32-bit timers
•Watch Dog
•Two CRC accelerators (one for the input data stream, one for the output data stream)
•JTAG
•Maximum Operating frequency: 40MHz for ClkIn
•Power Consumption: 350 mA at 40MHz for ClkIn
•Latch Up immunity better than 100 MeV
•Designed on Atmel M62265E matrix sea of gates, into an MQFPF256

•The T7904E can initialize the program memory according to a predefined configuration. The configuration is selected by reading the PMD(1-0) data bus in the last cycle of the reset phase: 1. PMD(1-0) = 00: No Program Memory Initialization is performed by the T7904E, 2. PMD(1-0) = 01: The Program Memory Initialization is done via the data bus DMD(15-8) of IO Area 0 for the flat package T7904E: 8-bit width, 3. PMD(1-0) = 10: The Program Memory Initialization is done via the data bus DMD(23-8) of IO Area 0 for the flat package T7904E: 16-bit width, 4. PMD(1-0) = 11: The Program Memory Initialization is done via the Synchronous Serial Input Link 1: 16-bit width.
•When the Program Memory Initialization is done via the IO Area 0 or via the Synchronous Serial Input Link 1, the 20 lsb of the first 6 x 8 bytes that are fetched, indicate the number of 48-bit words to be loaded in the Program Memory RAM. The least significant byte of the 48-bit words are fetched first. Each time a new byte is fetched, it is stored in the Program Register named PrgReg(47-0), the first byte in PrgReg(7-0), the second byte in PrgReg(15-8), the third byte in PrgReg(23-16), the fourth byte in PrgReg(31-24), the fifth byte in PrgReg(39-32) and the sixth byte in PrgReg(47-40). When 6 bytes are  vailable in PrgReg, the T7904E performs a DMA access to write the content of PrgReg(47-0) into the Program Memory RAM.
•During the Program Memory initialization, the T7904E generates the parity bit PMPar over PMD(47-0) if required.
•As soon as the Program Memory initialization is completed, the DSP can set the bit SysAv in the General Configuration Register (GConfReg). The value of SysAv in GConfReg is reflected on the output signal SysAv to indicate the system is available.