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SDE2526

Features: `Word-organized reprogrammable nonvolatile memory in n-channel floating-gate technology (E2PROM)`256X 8-bit organization`+ 5 V supply voltage`Serial 2-line bus for data input and output (I2C Bus)`Reprogramming mode, typ. 15 ms erase/write cycle`Reprogramming by means of on-chip control (...

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SDE2526: Features: `Word-organized reprogrammable nonvolatile memory in n-channel floating-gate technology (E2PROM)`256X 8-bit organization`+ 5 V supply voltage`Serial 2-line bus for data input and output (I...

SDE2526 Data Sheet

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Part Number:
SDE2526
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

`Word-organized reprogrammable nonvolatile memory in n-channel floating-gate technology (E2PROM)
`256 X 8-bit organization
`+ 5 V supply voltage
`Serial 2-line bus for data input and output (I2C Bus)
`Reprogramming mode, typ. 15 ms erase/write cycle
`Reprogramming by means of on-chip control (without external control)
`Data retention longer than 10 years
`More than 105 reprogramming cycles per address
`Extended temperature range from 40 to 110 °C


Pinout

Connection Diagram


Specifications

Parameter
Symbol
Limit Values
Unit
Supply voltage
Input voltage
VDD
VI
0.3 to 6
0.3 to 6
V
V
Storage temperature range
Tstg
55 to 125
°C
Thermal resistance P-DIP-8-4
Junction - air P-DSO-8-1
R th JA
100
170
K/W
K/W



Description

The I2C Bus is a bidirectional 2-line bus for the transfer of data between various integrated circuits. SD300N/R consists of a serial data line SDA and a serial clock line SCL. The data line requires an external pull-up resistor to VCC (open drain output stage).
 
About SD300N/R,The possible operational states of the I2C Bus are shown in figure 1. In the quiescent state, both lines SDA and SCL are high, i.e. the output stage of the data line is disabled. As long a SCL remains "1", information changes on the data bus indicate the start or the end of data transfer between two components.




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