Features: · 4-Kbyte unified cache· SAR (Segmentation and Reassembly)· UTOPIA (the Universal Test & Operations PHY Interface for ATM) Level 2 Interface· Ethernet MAC· Full-rate USB controller· 2-CH GDMA (General Purpose Direct Memory Access)· UART (Universal Asynchronous Receiver and Transmtter...
S5N8947X: Features: · 4-Kbyte unified cache· SAR (Segmentation and Reassembly)· UTOPIA (the Universal Test & Operations PHY Interface for ATM) Level 2 Interface· Ethernet MAC· Full-rate USB controller· 2-...
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Parameter |
Symbol |
Rating |
Unit | |
Supply Voltage | VDD/VDDA |
3.6 |
V | |
DC input Voltage | VIN |
2.5 V I/O |
3.6 |
V |
5 V-tolerant |
6.5 | |||
DC input current | IIN |
± 200 |
mA | |
Operating temperature | TOPR |
0 to 70 |
||
Storage temperature | TSTG |
65 to 150 |
Samsung's S5N8947X 16/32-bit RISC microcontroller is a cost-effective, high-performance microcontroller solution. The S5N8947 is designed as an integrated Ethernet controller for use in managed communication hubs and routers. The S5N8947 also provides ATM Layer SAR (Segmentation and Reassembly) function with UTOPIA interface and the full-rate USB (Universal Serial Bus) function.
The S5N8947X is built around an outstanding CPU core: the 16/32-bit ARM7TDMI RISC processor designed by Advanced RISC Machines, Ltd. The ARM7TDMI core is a low-power, general purpose, microprocessor macro-cell that was developed for use in application-specific and custom-specific integrated circuits. Its simple, elegant, and fully static design is particularly suitable for cost-sensitive and power-sensitive applications.
Important peripheral functions including an UART channel, 2-channel GDMA, two 32-bit timers, I2C bus controller, and programmable I/O ports are supported. Built-in logic including an interrupt controller, DRAM controller, and a controller for ROM/SRAM and flash memory are also supported. The S5N8947's System Manager includes an internal 32-bit system bus arbiter and an external memory controller.
To reduce total system cost, the S5N8947 offers a unified cache, Ethernet controller, SAR and USB. Most of the on-chip function blocks have been designed using an HDL synthesizer and the S5N8947 has been fully verified in Samsung's state-of-the-art ASIC test environment.