Features: • Upward-compatible with H8/300, H8/300H, and H8S CPUs-Can execute H8/300, H8/300H, and H8S/2000 object programs• Sixteen 16-bit general registers-Also usable as sixteen 8-bit registers or eight 32-bit registers• 87 basic instructions-8/16/32-bit arithmetic and logic in...
R5F61544: Features: • Upward-compatible with H8/300, H8/300H, and H8S CPUs-Can execute H8/300, H8/300H, and H8S/2000 object programs• Sixteen 16-bit general registers-Also usable as sixteen 8-bit ...
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• Upward-compatible with H8/300, H8/300H, and H8S CPUs
- Can execute H8/300, H8/300H, and H8S/2000 object programs
• Sixteen 16-bit general registers
- Also usable as sixteen 8-bit registers or eight 32-bit registers
• 87 basic instructions
- 8/16/32-bit arithmetic and logic instructions
- Multiply and divide instructions
- Bit field transfer instructions
- Powerful bit-manipulation instructions
- Bit condition branch instructions
- Multiply-and-accumulate instruction
• Eleven addressing modes
- Register direct [Rn]
- Register indirect [@ERn]
- Register indirect with displacement [@(d:2,ERn), @(d:16,ERn), or @(d:32,ERn)]
- Index register indirect with displacement [@(d:16,RnL.B), @(d:32,RnL.B),@(d:16,Rn.W), @(d:32,Rn.W), @ d:16,ERn.L), or @(d:32,ERn.L)]
- Register indirect with pre-/post-increment or pre-/post-decrement [@+ERn, @ERn+,@−ERn, or @ERn−]
- Absolute address [@aa:8, @aa:16, @aa:24, or @aa:32]
- Immediate [#xx:3, #xx:4, #xx:8, #xx:16, or #xx:32]
- Program-counter relative [@(d:8,PC) or @(d:16,PC)]
- Program-counter relative with index register [@(RnL.B,PC), @(Rn.W,PC), or @(ERn.L,PC)]
- Memory indirect [@@aa:8]
- Extended memory indirect [@@vec:7]
• Two base registers
- Vector base register
- Short address base register
• 4-Gbyte address space
- Program: 4 Gbytes
- Data: 4 Gbytes
• High-speed operation
- All frequently-used instructions executed in one or two states
- 8/16/32-bit register-register add/subtract: 1 state
- 8 * 8-bit register-register multiply: 1 state
- 16 ÷ 8-bit register-register divide: 10 states
- 16 * 16-bit register-register multiply: 1 state
- 32 ÷ 16-bit register-register divide: 18 states
- 32 * 32-bit register-register multiply: 5 states
- 32 ÷ 32-bit register-register divide: 18 states
• Four CPU operating modes
- Normal mode
- Middle mode
- Advanced mode
- Maximum mode
• Power-down modes
- Transition is made by execution of SLEEP instruction
- Choice of CPU operating clocks
Item | Symbol | Value | Unit |
Power supply voltage | VCC | 0.3 to +7.0 | V |
Input voltage (except ports 4 and 5) | Vin | 0.3 to VCC + 0.3 | V |
Input voltage (port 4) | Vin | 0.3 to AVCC1 + 0.3 | V |
Input voltage (port 5) | Vin | 0.3 to AVCC0 + 0.3 | V |
Reference voltage | Vref | 0.3 to AVCC0 + 0.3 | V |
AVCC0 | 0.3 to +7.0 | V | |
Analog power supply voltage | AVCC1 | 0.3 to +7.0 | V |
Analog input voltage (port 4) | VAN | 0.3 to AVCC1 + 0.3 | V |
Analog input voltage (port 5) | VAN | 0.3 to AVCC0 + 0.3 | V |
Operating temperature | Topr | Regular specifications: 20 to +75* |
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Wide-range specifications: 40 to +85* |
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Storage temperature | Tstg | 55 to +125 |
Caution: Permanent damage to the LSI may result if absolute maximum ratings are exceeded.
Note: * The operating temperature when programming/erasing the flash memory ranges from 0°C to +75°C for regular specification products and from 0°C to +85°C for wide-range specification products.
The H8SX CPU is a high-speed CPU with an internal 32-bit architecture that is upwardcompatible with the H8/300, H8/300H, and H8S CPUs.
The H8SX CPU has sixteen 16-bit general registers, can handle a 4-Gbyte linear address space, and is ideal for a realtime control system.