PPG312F

Features: · Digitally programmable in 4096 steps· Monotonic pulse-width-vs-address variation· Rising edge triggered· Two separate outputs: inverting & non-inverting· Precise and stable pulse width· Input & outputs fully TTL interfaced & buffered· 10 T2L fan-out capability· Fits standar...

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PPG312F Picture
SeekIC No. : 004464493 Detail

PPG312F: Features: · Digitally programmable in 4096 steps· Monotonic pulse-width-vs-address variation· Rising edge triggered· Two separate outputs: inverting & non-inverting· Precise and stable pulse wid...

floor Price/Ceiling Price

Part Number:
PPG312F
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

·  Digitally programmable in 4096 steps
·  Monotonic pulse-width-vs-address variation
·  Rising edge triggered
·  Two separate outputs: inverting & non-inverting
·  Precise and stable pulse width
·  Input & outputs fully TTL interfaced & buffered
·  10 T2L fan-out capability
·  Fits standard 40-pin DIP socket
·  Auto-insertable



Pinout

  Connection Diagram


Specifications

PARAMETER
SYMBOL
MIN
MAX
UNITS
NOTES
DC Supply Voltage VCC -0.3
7.0 V  
Input Pin Voltage

VIN

-0.3 VDD+0.3 V  
Storage Temperature TSTRG -55 150 C  
Lead Temperature TLEAD   300 C 10 sec



Description

The PPG312F-series device is a 12-bit digitally programmable pulse generator. The width, PWA, depends on the address code (A11-A0) according to the following formula:PWA = PW0 + TINC *
where A is the address code, TINC PPG312F-series is the incremental pulse width of the device, and PW0 is the inherent pulse width of the device. The incremental width is specified by the dash number of the device and can range from 0.5ns through 400ns,inclusively. RESET is held LOW during normal operation. When it is brought HIGH, OUT and OUT/ are forced into LOW and HIGH states, respectively, and the unit is ready for the next trigger input. The address is not latched and must remain asserted while the output pulse is active.


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