PLS168

The PLS168 is a bipolar, programmable state machine of the Mealy type. PLS168 contains logic AND-OR gate arrays with user programmable connections which control the inputs of on-chip state and output registers. PLS168 consist respectively of 10 Qp, and 4 Of edge-triggered, clocked SIR flip-flops, with an asynchronous preset option.In no event shall Sensitron Semiconductor be liable for any damages that may result from an accident or any other cause during operation of the user's units according to the datasheet(s). Sensitron Semiconductor assumes no responsibility for any intellectual property claims or any other problems that may result from applications of information, products or circuits described in the datasheets.

Features of the PLS168 are:(1)field-programmable (Ni-Cr link); (2)12 true/complement buffered inputs; (3)48 programmable AND gates; (4)29 programmable OR gates; (5)10-bit state register; (6)4-bit shared state/output register; (7)4-bit output register; (8)transition complement array; (9)programmable asynchronous preset/output enable; (10)positive edge-trigger clock; (11)power-on preset to logic "1" of all registers; (12)automatic logic "HOLD" state via S/R flip-flops; (13)on-chip test array; (14)power: 600mW; (15)TTL compatible; (16)3-State outputs; (17)Single +5V supply; (18)300mi1-wide 24-pin DIP.

The absolute maximum ratings of the PLS168 can be summarized as:(1)supply voltage:7 V;(2)storage temperature range:-65 to 150;(3)input voltage:10.0V;(4)operating temperature:-55 to 125;(5)output voltage:5.5V;(6)input current:-30 to 30mA.All transition terms can include True, False, or Don't Care states of the controlling variables, and are merged in the OR array to issue next-state and next-output commands to their respective registers on the log to high transition of the Clock pulse.Both True and Complement transition terms can be generated by optional use of the internal variable (C) from the complement array.Also, if desired, the Preset input can be converted to output-enable function, as an additional user programmable option.With Logic programming, the ANDIOR gate input connections necessary to implement the desired logic function are coded directly from the State Diagram using the Program Table on the following page.

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