PLS157

The PLS157 is a 3-state output, registered logic element combining AND/OR gate arrays with clocked J-K flip-flops. These J-K flip-flops are dynamically convertible to D-type via a "fold-back" inverting buffer and control gate Fc. PLS157 features 4 registered I/O gate and register configuration via control gates (D.L) raging from 16 inputs to 12 outputs. The AND/OR arrays consist of 32 logic AND gates, 13 control AND gates, and 21 OR gates with fusible link connections for programming I/O lines to 4 inputs(I), Bidirectional I/O line(B), internal flip-flop outputs(Q), and complement array output(C). The complement array consist of a NOR gates optionally linked to all AND gates complementary AND terms. On-chip T/C buffers couple either true(I,B,Q)or complement(I,B,Q,C)input polarities to all AND gates, PLS157's outputs can be optionally linked to all OR gates. Any of the 32 AND gates can dirve bidirectionally I/O lines(B), whose output polarity is individually programmable through a set of Ex-OR gates for implementing AND-OR or AND-NOR logic functions. Similarly,any of the AND gates can drive the J-K inputs to all filp-flops. The asynchronous preset and preset lines(P,R) are driven from the OR matrix.All flip-flops are postitive edge-triggered and can be used as input, otput or I/O(for interfacing with a bidrectional databus) in conjunction with load control gates(L), steering inputs(I),(B),(Q) and programmable output select lines(E). The PLS157 is field programmable, enabling the suer to quickly generate custom patterns using standard programming equipment.

PLS157 has many unique features: The first one is 32 AND gates. The second one is 21 OR gates. The thrid one is 6 bidirctional I/O gates. The forth one is 6 bidirectional registers. The fifth one is J-K, T, or D-type flip-flops. The sixth one is compelent array. The seventh one is active-high or low-outputs. The eighth one is positive edge-triggered clock, etc. Otherwise, there are also some applications about it.The first one is random sequential logic. The second one is synchronous up/dwon counters. The third one is shift registers. The forth one is bidirectional data buffers. The fifth one is timing function generators . The sixth one is system controllers/sychronizers. The seventh one is priority encoder/registers.

There are some absolute maximum ratings about PLS157.Supply voltage9Vcc) is +7 Vdc. Input voltage(Vin) is +5.5 Vdc. Output voltage(Vout) is +5.5 Vdc. Input currents(Iin) is -30 mA min and 30 mA max. Output currrents(Iout) is +100 mA max. Operating temperature range(Tamb) is 0  to +75 . Storage temperature range(Tstg) is -65  to +150 . Maximum junction is 150 .Maximum ambient is 75 . Allowable thermal rise ambient junction is 75 .

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