PIC16F877-20P

The PIC16F877-20P is one member of the PIC16F877 series.It has the following features including (1)Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation;(2)Programmable code protection;(3)Low power, high speed CMOS FLASH/EEPROM technology;(4)In-Circuit Serial Programming (ICSP) via two pins;(5)Single 5V In-Circuit Serial Programming capability;(6)Commercial, Industrial and Extended temperature ranges.

This document contains device specific information.Additional information may be found in the PICmicro™ Mid-Range Reference Manual which may be obtained from your local Microchip Sales Representative or downloaded from the Microchip website. The Reference Manual should be considered a complementary document to this data sheet, and is highly recommended reading for a better understanding of the device PIC16F877-20P architecture and operation of the peripheral modules.The PIC16F877 devices have a 13-bit program counter capable of addressing an 8K x 14 program memory space. The PIC16F877-20P devices have 8K x 14 words of FLASH program memory. Accessing a location above the physically implemented address will cause a wraparound.The PIC16F877-20P family has an 8-level deep x 13-bit wide hardware stack. The stack space is not part of either program or data space and the stack pointer is not readable or writable. The PC is PUSHed onto the stack when a CALL instruction is executed, or an interrupt causes a branch. The stack is POPed in the event of a RETURN,RETLW or a RETFIE instruction execution. PCLATH is not affected by a PUSH or POP operation.

The Special Function Registers can be classified into two sets: core (CPU) and peripheral. Those registers associated with the core functions are described in detail in this section. Those related to the operation of the peripheral features are described in detail in the peripheral features section.All PIC16F877-20P devices are capable of addressing a continuous 8K word block of program memory. The CALL and GOTO instructions provide only 11 bits of address to allow branching within any 2K program memory page. When doing a CALL or GOTO instruction,the upper 2 bits of the address are provided by PCLATH<4:3>. When doing a CALL or GOTO instruction,the user must ensure that the page select bits areprogrammed so that the desired program memory page is addressed.