Features: · PI74AVC+16821 is designed for low-voltage operation, VCC = 1.65V to 3.6V· True ±24mA Balanced Drive @ 3.3V· IOFF supports partial power-down operation· 3.6V I/O Tolerant Inputs and Outputs· All outputs contain a patented DDC (Dynamic Drive Control) circuit that reduces noise without de...
PI74AVC+16821: Features: · PI74AVC+16821 is designed for low-voltage operation, VCC = 1.65V to 3.6V· True ±24mA Balanced Drive @ 3.3V· IOFF supports partial power-down operation· 3.6V I/O Tolerant Inputs and Outpu...
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Features: SpecificationsDescriptionPericom Semiconductor's PI74ALPTX series of logic circuits are ...
Features: • PI74ALVC162334 is designed for low voltage operation, VCC = 2.3V to 3.6V• ...
Features: · PI74ALVC162834 is designed for low voltage operation, VCC = 2.3V to 3.6V· Outputs have...
· PI74AVC+16821 is designed for low-voltage operation, VCC = 1.65V to 3.6V
· True ±24mA Balanced Drive @ 3.3V
· IOFF supports partial power-down operation
· 3.6V I/O Tolerant Inputs and Outputs
· All outputs contain a patented DDC (Dynamic Drive Control) circuit that reduces noise without degrading propagation delay
· Industrial operation: 40°C to +85°C
· Available Packages:
· 56-pin 240 mil wide plastic TSSOP (A)
· 56-pin 173 mil wide plastic TVSOP (K)
Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Pericom Semiconductor's PI74AVC+ series of logic circuits are produced using the Company's advanced submicron CMOS technology, achieving industry leading speed.
The PI74AVC+ 16821 is a 20-bit bus interface flip-flop designed for 1.65V to 3.6V VCC operation. It can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20 flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the PI74AVC+ 16821 provides true data at the Q outputs.
A buffered output-enable (OE) input of PI74AVC+ 16821 can be used to place the ten outputs in either a normal logic state (HIGH or LOW level) or a highimpedance state. In the high-impedance state, the outputs of PI74AVC+ 16821 neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capacity to drive bus lines without the need for interface or pullup components.
OE does not affect the internal operation of the flip-flops. Old data of PI74AVC+ 16821 can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver.