PI74ALVTC16241

Supply Voltage Range, VDD.......................................... –0.5V to 4.6V
Input Voltage Range, VI ................................................. -0.5V to 4.6V
Output Voltage Range, VO (3-Stated) ............................ -0.5V to 4.6V
Output Voltage Range, VO(1) (Active) ................. –0.5V to VDD +0.5V
DC Input Diode Current (IIK) VI<0V........................................ -50mA
DC Output Diode Current (IOK)
VO<0V ................................................................................... -50mA
VO>VDD ................................................................................ ±50mA
DC Output Source/Sink Current (IOH/IOL) ......................... -64/128mA
DC VDD or GND Current per Supply Pin (ICC or GND) ....... ±100mA
Storage Temperature Range, Tstg ................................. –65°C to150°C

Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Pericom Semiconductor's PI74ALVCH series of logic circuits are produced in the Company's advanced 0.5 micron CMOS technology, achieving industry leading speed.

The PI74ALVCH162820 is a 10-bit flip-flop designed for 2.3V to 3.3V VCC operation. The PI74ALVCH162820 is designed with edgetriggered D-type flip-flops. On the positive transition of clock (CLK) input, the device provides true data at the Q outputs.

A buffered output-enable (OE) input of PI74ALVCH162820 can be used to place the ten outputs in either a normal logic state (HIGH or LOW level) or a highimpedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capacity to drive bus lines without the need for interface or pullup components. OE does not affect the internal operation of the flip-flops. Old data of PI74ALVCH162820 can be retained or new data can be entered while the outputs are in the high-impedance state.

The outputs, PI74ALVCH162820 is designed to sink up to 12mA, include 26W resistors to reduce overshoot and undershoot.

The PI74ALVCH162820 has "Bus Hold" which retains the data input's last state whenever the data input goes to high-impedance preventing "floating" inputs and eliminating the need for pullup/ down resistors.

Active bus-hold circuitry of PI74ALVCH162820 is provided to hold unused or floating data inputs at a valid logic level.