PI74ALVCH16823

Storage Temperature ............................................................ –65°C to +150°C
Ambient Temperature with Power Applied .......................... –40°C to +85°C
Input Voltage Range, VIN .................................................... –0.5V to VCC +0.5V
Output Voltage Range, VOUT............................................. –0.5V to VCC +0.5V
DC Input Voltage ................................................................... –0.5V to +5.0V
DC Output Current .............................................................................. 100 mA
Power Dissipation ................................................................................... 1.0W

Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Pericom Semiconductor's PI74ALVCH series of logic circuits are produced in the Company's advanced 0.5 micron CMOS technology, achieving industry leading speed.

The 18-bit PI74ALVCH16823 bus-interface flip-flop is designed for 2.3V to 3.6V VCC operation. It features 3-state outputs designed specifically for driving highly capacitive or relatively lowimpedance loads. This device is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

The PI74ALVCH16823 can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the Clock Enable (CLKEN) input LOW, the D-type flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN HIGH disables the clock buffer, thus latching the outputs. Taking the Clear (CLR) input LOW causes the Q outputs to go LOW independently of the clock.

A buffered Output Enable (OE) input of PI74ALVCH16823 can be used to place the nine outputs in either a normal logic state (high or low logic levels) or high-impedance state. In the high-impedance state, the outputs of PI74ALVCH16823 neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

The Output Enable (OE) input of PI74ALVCH16823 does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry of PI74ALVCH16823 is provided to hold unused or floating data inputs at a valid logic level.