Features: ` PI74ALVCH1622601is designed for low voltage operation
` VCC = 2.3V to 3.6V
` Hysteresis on all inputs
` Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C
` Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C
` Inputs/Outputs have equivalent 26W series resistors, no external resistors are required.
` Bus Hold retains last active bus state during 3-state eliminates the need for external pullup resistors
` Industrial operation at 40°C to +85°C
` Packages available: 56-pin 240 mil wide plastic TSSOP (A) 56-pin 300 mil wide plastic SSOP (V)Pinout
SpecificationsStorage Temperature .................................................. –65°C to +150°C
Ambient Temperature with Power Applied ................. –40°C to +85°C
Input Voltage Range, VIN ..................................... –0.5V to VCC +0.5V
Output Voltage Range, VOUT ............................... –0.5V to VCC +0.5V
DC Input Voltage .......................................................... –0.5V to +5.0V
DC Output Current ......................................................................100mA
Power Dissipation ..........................................................................1.0W
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DescriptionPericom Semiconductor's PI74ALVCH series of logic circuits are produced in the Company's advanced 0.5 micron CMOS technology, achieving industry leading speed.
The PI74ALVCH1622601 uses D-type latches and D-type flipflops with 3-state outputs to allow data flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by Output Enable (OEAB and OEBA), Latched Enable (LEAB and LEBA), and Clock (CLKAB and CLKBA) inputs. The clock can be controlled by the Clock Enable (CLKENAB and CLKENBA) inputs. For A-to-B data flow, the PI74ALVCH1622601 operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A-bus is stored in the latch/flip-flop on the low-to-high transition of CLKAB.
When OEAB is low, the outputs are active. When OEAB is HIGH, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, CLKBA, and CLKENBA.
To reduce overshoot and undershoot, the inputs/outputs include 26W series resistors.
To ensure the high-impedance state during power up or power down, OE should be tied to Vcc through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The PI74ALVCH1622601 has "Bus Hold" which retains the data input's last state whenever the data input goes to high-impedance preventing "floating" inputs and eliminating the need for pullup/ down resistors.
PI74ALVCH1622601 Data Sheet
