Features: · PI74ALVCH162260 is designed for low voltage operation
· VCC = 2.3V to 3.6V
· Hysteresis on all inputs
· Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C
· Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C
· Bus Hold retains last active bus state during 3-STATE, eliminating the need for external pullup resistors
· Industrial operation at –40°C to +85°C
· Packages available: - 56-pin 240 mil wide plastic TSSOP (A) - 56-pin 300 mil wide plastic SSOP (V)Pinout
SpecificationsStorage Temperature .................................................................... 65°C to +150°C
Ambient Temperature with Power Applied .................................... 40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. 0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ........... 0.5V to +7.0V
DC Input Voltage ............................................................................ 0.5V to +7.0V
DC Output Current ..................................................................................... 120 mA
Power Dissipation ..........................................................................................1.0W
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DescriptionPericom Semiconductor's PI74ALVCH series of logic circuits areproduced in the Company's advanced 0.5 micron CMOStechnology, achieving industry leading speed.
The PI74ALVCH162260 is a 12-bit to 24-bit multiplexed D-typelatch designed for 2.3V to 3.6 VCC operation. It is used inapplications where two separate datapaths must be multiplexedonto, or demultiplexed from, a single data path.
PI74ALVCH162260 applications include multiplexing and/or demultiplexingaddress and data information in microprocessor orbus-interface applications. This device is also useful inmemory-interleaving applications.
Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) areavailable for address and/or data transfer. The output-enable(OE1B, OE2B, and OEA) inputs control the bus transceiverfunctions. The OE1B and OE2B control signals also allow bankcontrol in the A-to-B direction.
Address and/or data information about PI74ALVCH162260 can be stored using theinternal storage latches. The latch-enable (LE1B, LE2B, LEA1B,and LEA2B) inputs are used to control data storage. When thelatch-enable input is HIGH, the latch is transparent. When thelatch-enable input goes LOW, the data of PI74ALVCH162260 present at the inputsis latched and remains latched until the latch-enable input isreturned HIGH.
To reduce overshoot and undershoot, the B-port outputsinclude 26W series resistors.
To ensure the high-impedance state during power up or power?own, OE should be tied to Vcc through a pullup resistor, the inimum value of the resistor is determined by the currentsinking apability of the driver.
Active bus-hold circuitry of PI74ALVCH162260 is provided to hold unused or floating data inputs at a valid logic level.
PI74ALVCH162260 Data Sheet
