Features: Two copies of CPU clock with VDD of 2.5V ±5%100 MHz or 66 MHz operationSix copies PCI clock (synchronous with CPU clock) 3.3VOne copy of Ref. clock @ 14.31818 MHz (3.3VTTL)48 MHz USB Clock, 24 MHz Super I/O clockI2C Serial Configuration InterfaceSpread Spectrum Modulation for CPUCLK, and...
PI6C105: Features: Two copies of CPU clock with VDD of 2.5V ±5%100 MHz or 66 MHz operationSix copies PCI clock (synchronous with CPU clock) 3.3VOne copy of Ref. clock @ 14.31818 MHz (3.3VTTL)48 MHz USB Clock...
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Storage Temperature .................................................-65°C to +150°C
Ambient Temperature with Power Applied .....................-0°C to +70°C
3.3V Supply Voltage to Ground Potential .......................-0.5V to +4.6V
2.5V Supply Voltage to Ground Potential .......................-0.5V to +3.6V
DC Input Voltage ...........................................................-0.5V to +4.6V
Note:Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
The PI6C105 is a high-speed, low-noise clock generator designed to work with the PI6C18x family of clock buffers to meet all clock needs for Mobile Intel Architecture platforms. CPU and chipset clock frequencies of 66.6 MHz and 100 MHz are supported.
Split supplies of 3.3V and 2.5V are used. The 3.3V power supply powers a portion of the I/O and the core. The 2.5V is used to power the remaining outputs. 2.5V signaling follows JEDEC standard 8-X. Power sequencing of the 3.3V and 2.5V supplies is not required.An asynchronous PWR_DWN# signal of PI6C105 may be used to power down (or up) the system in an orderly manner.