Features: Four copies of CPU clock with VDD of 2.5V + 5%100 MHz or 66 MHz operationEight copies of PCI clock, (synchronous with CPU clock) 3.3VTwo copies of IO APIC clock @14.31818 MHzTwo copies of 48 MHz clockThree copies of Ref. clock @14.31818 MHz (3.3V TTL)Low cost 14.31818 MHz crystal oscilla...
PI6C100: Features: Four copies of CPU clock with VDD of 2.5V + 5%100 MHz or 66 MHz operationEight copies of PCI clock, (synchronous with CPU clock) 3.3VTwo copies of IO APIC clock @14.31818 MHzTwo copies of ...
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Features: ` 100 MHz or 66.6 MHz operation` Two copies of CPU clock with VDD of 2.5V` High drive op...
Storage Temperature ....................................................-65°C to +150°C
Ambient Temperature with Power Applied ....................... -0°C to +70°C
3.3V Supply Voltage to Ground Potential ..........................-0.5V to +4.6V
2.5V Supply Voltage to Ground Potential ..........................-0.5V to +3.6V
DC Input Voltage ..............................................................-0.5V to +4.6V
Note:Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
The PI6C100 is a high-speed low-noise clock generator designed to work with the PI6C180 clock buffer to meet all clock needs for Intel Architecture platforms. CPU and chipset clock frequencies of 66.6 MHz and 100 MHz are supported.
Split supplies of 3.3V and 2.5V are used. The 3.3V power supply powers a portion of the I/O and the core. The 2.5V is used to power the remaining outputs. 2.5V signaling follows JEDEC standard 8-X. Power sequencing of the 3.3V and 2.5V supplies is not required.An asynchronous PWRDWN# signal of PI6C100 may be used to orderly power down (or up) the system.