PHT1N60T

PHT1N60T N-channel enchancement mode field-effect power transistor in a plastic envelope suitable for surface mounting featuring high avalanche energy capability, stable blocking voltage,fast switching and high thermal cycling performance. Intended for use in compact fluroescent lights(CFL)and general purpose switching applications.

There are some limiting values of PHT1N60T(limiting values in accordance with the absolute maximum system).Drain-source voltage(V_DS) is 600 V max. Drain-gate voltage(V_DGR) is 600 V when RGS is 20 k. Gate-source voltage is 30 V. Drian current(DC)(I_D) is 0.65 A when Tsp is 25 or is 0.45 A when Tsp is 100.Drain current(pulse peak value)(I_DM) is 2.6 A when Tsp is 25.Source-drain diode current(DC)(I_DR) is 0.8 A when Tsp is 25.Source-drain diode current(pulse peak value)(IDRM) is 2.6 A when Tsp is 25.Total power dissipation(Ptot) is 1.8 W when Tsp is 25. Junction temperature(Tj) is 150. Storage temperature(T_stg) is -55 to 150.Otherwise, there are also some thermal resistances about it.Thermal resistance junction to solder point is 15 k/W max. Thermal resistance junction to ambient is 156 K/W typ (pcb mounted;minimum footprint).Static characteristics: Drain-source breakdwon voltage(V_(BR)DSS ) is 600 V min when VGS is 0V, ID is 0.25 mA. Gate threshold voltage (V_GS(TO) ) is 2.0 Vmin,3.0 V typ and 4.0 V max when V_DS is V_GS, I_D is 0.25 mA. Drin-source leakage current(I_DSS) is 1uA typ and 100 uA max when V_DS is 500 V , V_GS is 0 V, Tj is 25.Gate-source leakage current(I_GSS) is 4 nA typ and 100 nA max when VGS is ±35 V,VDS is 0 V.Drain-source on-state resistance(R_DS(ON) ) is 8 max when V_GS is 10 V , I_D is 1 A. Source-drain diode forward voltage(V_SD) is 0.85 V typ and 1.2 V max when I_F is 2 A, V_GS is 0 V.Dynamic characteristics:Forward transconductance(gfs) is 0.5 S min and 0.8 S typ when V_DS is 15 V and I_D is 1 A. Input capacitance(Ciss) is 75 pF typ and 100 pF max when V_GS is 0 V , V_DS is 25 V and f is 1 MHz.Feedback capacitance(Crss) is 10 pF typ and 15 pF max when VGS is 0 V , V_DS is 25 V and f is 1 MHz.Total gate charge is 5 nC typ when V_GS is 10 V , Id is 2 A and V_DS is 400 V.Gate to source charge is .5 nC typ when VGS is 10 V , Id is 2 A and V_DS is 400 V.Gate to drain(Miller)charge is 3 nC typ when V_GS is 10 V , Id is 2 A and VDS is 400 V. Turn-on delay time(t_don) is 5 ns typ and 10 ns max when V_DD is 30 V , I_D is 2 A , V_GS is 10 V , R_GS is 50 ohms , R_GEN is 50 ohms. Turn-on rise time(t_r) is 15 ns typ and 20 ns max when V_DD is 30 V , I_D is 2 A , V_GS is 10 V , R_GS is 50 ohms , R_GEN is 50 ohms.Turn-off delay time(t_doff) is 15 ns typ and 20 ns max when V_DD is 30 V , I_D is 2 A , V_GS is 10 V , R_GS is 50 ohms , R_GEN is 50 ohms.

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