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PHD101NQ03LT

Features: ·Low gate charge·Low on-state resistance.Application·Optimized as a control FET in DC to DC convertorsPinoutSpecifications Symbol Parameter Conditions Min Max Unit VDS drain-source voltage (DC) 25 Tj 175 - 30 V VDGR drain-gate voltage (DC) 25 Tj 175 ; RGS = ...

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PHD101NQ03LT: Features: ·Low gate charge·Low on-state resistance.Application·Optimized as a control FET in DC to DC convertorsPinoutSpecifications Symbol Parameter Conditions Min Max Unit VDS drain-...

PHD101NQ03LT Data Sheet

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Part Number:
PHD101NQ03LT
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

·Low gate charge
·Low on-state resistance.


Application

·Optimized as a control FET in DC to DC convertors


Pinout

Connection Diagram




Specifications

Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage (DC) 25 Tj 175 - 30 V
VDGR drain-gate voltage (DC) 25 Tj 175 ; RGS = 20 k - 30 V
VGS gate-source voltage (DC)   - ±20 V
VGSM gate-source voltage TP 50 s; pulsed; duty cycle = 25%;Tj 150   ±25  
ID drain current (DC) Tmb = 25 ; VGS = 10 V; Figure 2 and 3 - 75 A
Tmb = 100 ; VGS = 10 V; Figure 2 - 75 A
IDM peak drain current Tmb = 25 ; pulsed; tp 10 s; Figure 3 - 240 A
Ptot total power dissipation Tmb = 25 ; Figure 1 - 166 W
Tstg storage temperature   -55 +175
Tj junction temperature   -55 +175
Source-drain diode
IS source (diode forward) current (DC) Tmb = 25 - 74 A
ISM peak source (diode forward) current Tmb = 25 ; pulsed; tp 10 s - 240 A
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy		 unclamped inductive load; ID = 43A;
tp = 0.19 ms; VDD 15 V; RGS = 50 ; VGS = 10 V; starting Tj = 25 		- 185 mJ



Description

N-channel logic level field-effect power transistor in a plastic package using TrenchMOS™ technology.

Product availability:

PHB101NQ03LT in SOT404 (D2-PAK)

PHD101NQ03LT in SOT428 (D-PAK).


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