PFM18030F

Features: ` 29 dB Gain` 30 Watts Peak Output Power` Internal Tracking FETs (for improved bias control)` IS95 CDMA Performance 5 Watts Average Output Level 20% Power Added Efficiency49 dBc ACPRSpecifications Rating Symbol Value Units 19 DC Drain Supplya) DraintoSourceVoltage, (VGS=0),...

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SeekIC No. : 004459790 Detail

PFM18030F: Features: ` 29 dB Gain` 30 Watts Peak Output Power` Internal Tracking FETs (for improved bias control)` IS95 CDMA Performance 5 Watts Average Output Level 20% Power Added Efficiency49 dBc ACPRSpecif...

floor Price/Ceiling Price

Part Number:
PFM18030F
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

` 29 dB Gain
` 30 Watts Peak Output Power
` Internal Tracking FETs (for improved bias control)
` IS95 CDMA Performance 5 Watts Average Output Level 20% Power Added Efficiency49 dBc ACPR



Specifications

  Rating Symbol Value Units
19 DC Drain Supply
a) DraintoSource
Voltage, (VGS=0), D1 & D2
& Track D1 & Track D2
b) Normal Operation (Class AB operation)
VDS
VD_SUPPLY
+50
+30
Volts DC
Volts DC
20 DC Gate Supply
a) Gatetosource
Voltage (VDS=0)
Normal Operation (Class AB operation)
VGS
VG_SUPPLY
0.5<VGS<+15
0<VGS<+6
Volts DC
Volts DC
21 RF Input Power PIN +25 dBm
22 Maximum Power Dissipation (T +85 )
a) Derate above +85 base temperature.
PTOTAL 65
0.7
Watts
Watts/
23 Maximum Channel Operating Temperature TCH +200
24 Storage Temperature Range TSTG 40to +150



Description

This versatile DCS module of PFM18030SM provides excellent linearity and efficiency in a lowcost surface mount package. The PFM18030SM includes two stages of amplification, along with internal sense FETs that are on the same silicon die as the RF devices. These thermally coupled sense FETs simplify the task of bias temperature compensation of the overall amplifier. The module includes RF input, interstage, and output matching elements. The source and load impedances required for optimum operation of the PFM18030SM are much higher (and simpler to realize) than for unmatched Si LDMOS transistors of similar performance.

 The surface mount package base of PFM18030SM is typically soldered to a conventional PCB pad with an array of via holes for grounding and thermal sinking of the PFM18030SM. Optimized internal construction supports low FET channel temperature for reliable operation.




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