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PDTC115EE

Features: ` Built-in bias resistors R1 and R2 (typically 100 k each)` Simplification of circuit design` Reduces number of components and required PCB area.Application· Especially suitable for space reduction in interface and driver circuits· Inverter circuit configuration without use of external r...

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PDTC115EE: Features: ` Built-in bias resistors R1 and R2 (typically 100 k each)` Simplification of circuit design` Reduces number of components and required PCB area.Application· Especially suitable for space ...

PDTC115EE Data Sheet

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Part Number:
PDTC115EE
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

` Built-in bias resistors R1 and R2 (typically 100 k each)
` Simplification of circuit design
` Reduces number of components and required PCB area.


Application

· Especially suitable for space reduction in interface and driver circuits
· Inverter circuit configuration without use of external resistors.


Pinout

Connection Diagram


Specifications

SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCBO
 collector-base voltage open emitter
-
50
V
VCEO
 collector-emitter voltage open base
-
50
V
VEBO
 emitter-base voltage open collector
-
10
V
VI
 input voltage
   positive
   egative
-
-
+40
-10
V
V
IO
 output current (DC)
-
20
mA
ICM
 peak collector current
-
100
mA
Ptot
 total power dissipation Tamb 25; note 1
-
150
mW
TSTG
 Storage temperature
65
+150
Tj
 junction temperature
-
150
Tamb
 operating ambient temperature
-65
+150
Note
1. Refer to standard SOT416 (SC-75) mounting conditions.


Description

PDTC115EE NPN resistor-equipped transistor in a SOT416 (SC-75) plastic package.


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