PDSP16488AMA

Features: ·The PDSP16488A is a fully compatible replacement for the PDSP16488 ·8 or 16 bit pixels with rates up to 40 MHz ·Window sizes up to 8 x 8 with a single device ·Eight internal line delays ·Supports interlace and frame to frame operations ·Coefficients supplied from an EPROM or remote host...

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SeekIC No. : 004457512 Detail

PDSP16488AMA: Features: ·The PDSP16488A is a fully compatible replacement for the PDSP16488 ·8 or 16 bit pixels with rates up to 40 MHz ·Window sizes up to 8 x 8 with a single device ·Eight internal line delays ·...

floor Price/Ceiling Price

Part Number:
PDSP16488AMA
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/25

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Product Details

Description



Features:

·The PDSP16488A is a fully compatible replacement for the PDSP16488
·8 or 16 bit pixels with rates up to 40 MHz
·Window sizes up to 8 x 8 with a single device
·Eight internal line delays
·Supports interlace and frame to frame operations
·Coefficients supplied from an EPROM or remote host
·Expandable in both X and Y for larger windows
·Gain control and pixel output manipulation
·132 pin QFP




Specifications

`Supply voltage Vcc -0.5V to 7.0V
`Input voltage VIN -0.5V to Vcc + 0.5V
`Output voltage VOUT -0.5V to Vcc + 0.5V
`Clamp diode current per pin IK (see note 2) 18mA
`Static discharge voltage (HMB) 500V
`Storage temperature TS -65 to 150
`Max. junction temperature Military 150
`Package power dissipation 3000mW
`Thermal resistances, junction to case oJC 5/W




Description

The PDSP16488AMA is a fully integrated, application spe-cific, image processing device. It  performs a two dimensional convolution between the pixels within a video window and a set of stored coefficients.  An internal multiplier accumulator array can be multi-cycled at double or quadruple the pixel clock rate. This then gives the window size options listed in Table 1.

An internal 32k bit RAM  can be configured to provide either four or eight line delays.  The length of each delay by PDSP16488AMA can be programmed to the users requirement, up to a maximum of 1024 pixels per line. The line delays are arranged in two groups,which may be internally connected in series or may  be configured to accept separate pixel inputs. This allows inter- laced video or frame to frame operations to be supported.

The 8 bit coefficients are also stored internally and can be downloaded from a host computer or from an EPROM. No additional logic is required to support the EPROM and a single PDSP16488AMA can support up to 16 convolvers.

The PDSP16488AMA contains an expansion adder and delay network which allows several devices to be cascaded.

Convolvers with larger windows can then be fabricated as shown in Table 2.

Intermediate 32 bit precision is provided to avoid any danger of overflow,  but  the final result will not normally occupy all bits. The PDSP16488AMA thus provides a multiplier in the output path, which allows the user to align the result to the most significant end of the 32 bit word.




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