Features: `High Speed (Equal Access and Cycle Times)- 15/17/20/25/35 ns (Commercial)- 20/25/35/45 ns (Industrial)`Single 5 Volts ±10% Power Supply`Easy Memory Expansion Using CE 1, CE2 and OE Inputs `Common Data I/O`Three-State Outputs`Fully TTL Compatible Inputs and Outputs`Advanced CMOS Technolo...
P4C1024: Features: `High Speed (Equal Access and Cycle Times)- 15/17/20/25/35 ns (Commercial)- 20/25/35/45 ns (Industrial)`Single 5 Volts ±10% Power Supply`Easy Memory Expansion Using CE 1, CE2 and OE Inputs...
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Symbol |
Parameter |
Min |
Max |
Unit |
VCC |
Supply Voltage with Respect to GND |
-0.5 |
7.0 |
V |
VTERM |
Terminal Voltage with Respect to GND (up to 7.0V) |
-0.5 |
VCC + 0.5 |
V |
TA |
Operating Ambient Temperature |
-55 |
125 |
°C |
STG |
Storage Temperature |
-65 |
150 |
°C |
IOUT |
Output Current into Low Outputs |
25 |
mA | |
ILAT |
Latch-up Current |
>200 |
mA |
The P4C1024 is a 1,048,576-bit high-speed CMOS static RAM organized as 128Kx8. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. The RAM P4C1024 operates from a single 5V±10% tolerance power supply.
Access times of 15 nanoseconds permit greatly enhanced system operating speeds. CMOS is utilized to reduce power consumption to a low level. The P4C1024 is a member of a family of PACE RAM™ products offering fast access times.
The P4C1024 device provides asynchronous operations with matching access and cycle times. Memory locations are specified on address pins A0 to A16. Reading is accomplished by device selection (CE 1 low and CE 2 high) and output enabling (OE ) while write enable (WE) remains HIGH. By presenting the address under these conditions, the data of P4C1024 in the addressed memory location is presented on the data input/output pins. The input/output pins stay in the HIGH Z state when either CE 1 or OE is HIGH or WE or CE2 is LOW.
Package options for the P4C1024 include 32-pin 300 mil DIP and SOJ packages as well as 400 mil SOJ.