NT512D64S8HB0G

Features:

• 184 Dual In-Line Memory Module (DIMM)
• Unbuffer• DRAM DLL aligns DQ and DQS transitions with clock transitions
• Address and control signals are fully synchronous to positive lock edge
• Programmable Operation:
- DIMM CAS Latency: 2, 2.5, 3
- Burst Type: Sequential or Interleave
- Burst Length: 2, 4, 8
- Operation: Burst Read and Write
• Auto Refresh (CBR) and Self Refresh Modes
• Automatic and controlled precharge commands
• 7.8 s Max. Average Periodic Refresh Interval
• Serial Presence Detect EEPROM
• Gold contacts
• SDRAMs are packaged in TSOP packages
• "Green" packaging lead freeed DDR DIMM based on 256M bit die B device,  organized as either 32Mbx8 or 16Mbx16


Specifications

Symbol	Parameter	Rating	Units
VIN VOUT	Voltage on I/O pins relative to VSS	-0.5 to VDDQ +0.5	V
VIN	Voltage on Input relative to VSS	-0.5 to +3.6	V
VDD	Voltage on VDD supply relative to VSS	-0.5 to +3.6	V
VDDQ	Voltage on VDDQ supply relative to VSS	-0.5 to +3.6	V
TA	Operating Temperature (Ambient)	0 to +70	°C
TSTG	Storage Temperature (Plastic)	-55 to +150	°C
PD	Power Dissipation (per device component)	1	W
IOUT	Short Circuit Output Current	50	mA

Note: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is stress
rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.


Description

NT512D64S8HB0G, NT512D64S8HB1G, NT512D64S8HB1GY, NT512D72S8PB0G, NT256D64SH88B0G, NT256D64SH88B1G, NT56D64SH88B1GY, 256D72S89B0G and NT128D64SH4B1G are unbuffered 184-Pin Double Data Rate (DDR) Synchronous DRAM DualIn-Line Memory Modules (DIMM). NT512D64S8HB1GY and NT256D64SH88B1GY are packaged using lead free technology.