Features: `Select Pins Compatible with TTL Levels`Channel Select Input Over-CVoltage Tolerant to 5.5 `Fast Switching and Propagation Speeds`Break-CBefore-CMake Circuit`Low Power Dissipation: ICC = 2 A (Max) at TA = 25`Diode Protection Provided on Channel Select Input`Improved Linearity and Lower O...
NLAST44599: Features: `Select Pins Compatible with TTL Levels`Channel Select Input Over-CVoltage Tolerant to 5.5 `Fast Switching and Propagation Speeds`Break-CBefore-CMake Circuit`Low Power Dissipation: ICC = 2...
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Multiplexer Switch ICs 2:1 Mux/Demux Switch -55 to 125deg C
`Select Pins Compatible with TTL Levels
`Channel Select Input Over-CVoltage Tolerant to 5.5
`Fast Switching and Propagation Speeds
`Break-CBefore-CMake Circuit
`Low Power Dissipation: ICC = 2 A (Max) at TA = 25
`Diode Protection Provided on Channel Select Input
`Improved Linearity and Lower ON Resistance over Input Voltage
`Latch-Cup Performance Exceeds 300 m
`ESD Performance: HBM > 2000 V; MM > 200 V
`Chip Complexity: 158 FETs
Symbol | Parameter | Value | Unit |
VCC | Positive DC Supply Voltage | -0.5 to +7.0 | V |
VIS | Analog Input Voltage (VNO or VCOM) | -0.5 VISVCC +0.5 | V |
VIN | Digital Select Input Voltage | -0.5 VI + 0.5 | V |
IIK | DC Current, Into or Out of Any Pin | ±50 | mA |
PD | Power Dissipation in Still Air TSSOP−16 | 450 |
mA |
TSTG | Storage Temperature Range | -65 to +150 | °C |
TL | Lead Temperature, 1 mm from Case for 10 Seconds | 260 | °C |
TJ | Junction Temperature Under Bias | +150 | °C |
MSL | Moisture Sensitivity | Level 1 | |
FR | Flammability Rating Oxygen Index: 28 to 34 | UL 94−V0 (0.125 in) | |
VESD | ESD Withstand Voltage Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) |
2000 200 1000 |
V |
ILatchUp | LatchUp Performance Above VCC and Below GND at 85C (Note 5) | ±300 | mA |
JA | Thermal Resistance SOT- 353 (Note 1) SOT- 553 |
80 164 |
°C/W |
Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Extended exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-Cmaximum-Crat conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions.
1.Tested to EIA/JESD22-CA114-C
2.Tested to EIA/JESD22-CA115-C
3.Tested to JESD22-CC101-C
4.Tested to EIA/JESD78.
The NLAST44599 is an advanced CMOS dual-Cindependen DPDT (double pole-Cdouble throw) analog switch, fabricated wit silicon gate CMOS technology.NLAST44599 achieves high-Cspeed propagatio delays and low ON resistances while maintaining CMOS low-Cpowe dissipation. This DPDT NLAST44599 controls analog and digital voltages that may vary across the full power-Csupply range (from VCC to GND).
NLAST44599 has been designed so the ON resistance (RON ) is much lower and more linear over input voltage than RON of typical CMOSanalog switches. The channel-Cselect input structure of NLAST44599 provides protection whe voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. This input structure helps prevent device destruction caused by supply voltage -C input/output voltage mismatch, battery backup hot insertion, etc.
The NLAST44599 can also be used as a quad 2-Cto-C1 multiplexe demultiplexer analog switch with two Select pins that each controls two multiplexer-Cdemultiplexers