NLAST4053

The NLAST4053 is an improved version of the MC14053 and MC74HC4053 fabricated in submicron Silicon Gate CMOS
technology for lower R_DS(on) resistance and improved linearity with low current. This device may be operated either with a single supply or dual supply up to ±3 V to pass a 6 VPP signal without coupling capacitors.

When operating in single supply mode, it is only necessary to tie V_EE, pin 7 to ground. For dual supply operation, V_EE is tied to a negative voltage, not to exceed maximum ratings. Translation is provided in the device, the Address and Inhibit pins are standard TTL level compatible. For CMOS compatibility see NLAS4053. Pin for pin compatible with all industry standard versions of '4053.'
• Improved R_DS(on) Specifications
• Pin for Pin Replacement for MAX4053 and MAX4053A
One Half the Resistance Operating at 5.0 Volts
• Single or Dual Supply Operation
Single 35 Volt Operation, or Dual ±3 Volt Operation
With V_CC of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,
No Translators Needed
Address and Inhibit Pins are OverVoltage Tolerant and May Be
Driven Up +6 V Regardless of V_CC
• Address and Inhibit Pins are Standard TTL Compatible
Greatly Improved Noise Margin Over MAX4053 and MAX4053A
True TTL Compatibility V_IL = 0.8 V, V_IH = 2.0 V
• Improved Linearity Over Standard HC4053 Devices
• Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin Packages