NLAS44599

Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute−maximum−rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to JESD22−C101−A.
4. Tested to EIA/JESD78.

The NLAS44599 is an advanced dual−independent CMOS double pole−double throw (DPDT) analog switch fabricated with silicon gate CMOS technology. It achieves high speed propagation delays and low ON resistances while maintaining CMOS low power dissipation. This DPDT controls analog and digital voltages that may vary across the full power−supply range (from V_CC to GND).

NLAS44599 has been designed so the ON resistance (RON) is much lower and more linear over input voltage than RON of typical CMOS analog switches.

The channel select input is compatible with standard CMOS outputs. The channel select input structure of NLAS44599 provides protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. This input structure helps prevent device destruction caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc.

The NLAS44599 can also be used as a quad 2−to−1 multiplexer− demultiplexer analog switch with two Select pins that each controls two multiplexer−demultiplexers.