NJU6575

The NJU6575 is a bit map LCD driver to display graphics or characters.It contains 4,422 bits display data RAM, microprocessor interface circuits, instruction decoder, 134-segment and 33-common(1 out of 33-driver is prepared for icon display) drivers.The bit image display data is transferred to the display data RAM by serial or 8-bit parallel mode.33 x 134 dots graphics or 8-character 2-line by 16 x 16 dot character with icon are displayed by NJU6575 itself.The wide operating voltage like as 2.4V t o S.SV and low operating current are useful to apply small sized battery operated items.The rectangle outlook is very applicable to COG or Slim TCP.

Features of the NJU6575 are:(1)direct correspondence between display data RAM and LCD pixel; (2)display data RAM:4,422 bits; (3)167 LCD drivers--33- common and 134-segment; (4)direct interface with both of 68 and 80 type MPU; (5)serial interface; (6)programmable duty ratio;1/32 or 1/33 duty; (7)useful instruction set:display data readiwrite, display ON/OFF cont, inverse display, page address set,column address set,  status read, all On/Off, icon display, read modify write,  common driver order assignment and power saving; (8)power supply circuits for lcd incorporated step up circuits, regulator, voltage follower x 4; (9)electrical variable resistance; (10)low power consumption;(11)operating voltage:2.4V~5.5V;(12)LCD driving voltage:6.0V~13.5V;(13)package outline:chip/bumped chip/TCP; (14)C-MOS technology.

The absolute maximum ratings of the NJU6575 can be summarized as:(1)supply voltage Vdd:-0.3 to 7.0V;(2)storage temperature:-55 to +125;(3)operating temperature:-30 to 80 ;(4)supply voltage V5:Vdd-13.5 to Vdd+0.3V;(5)input voltage:-0.3 to Vdd+0.3V;(6)supply voltage V1-V4:V5 to Vdd+0.3V.The clock for Line Counter and latch signal for the Latch Circuits are generated from display clock(CL).The line address is renewed by synchronizing with display clock and 134 bits display data are latched into display latch circuits synchronizing with display clock then output to the LCD driving circuits.The display data transfer to the LCD driving circuits is executed independently with RAM access by the MPU.Display data latch stores 134-bit of one line display data for each common cycle which read out from the display data RAM temporary and transfer this data to the LCD Driver.The display on/off and static drive on/off controls the latched data only,therefore, the data in the display data RAM is no change and keep on remaining.