NJU6570A

The NJU6570A has the following features including Direct Correspondence between Display Data RAM and LCD Pixel;Display Data RAM2,560 bits  80 x 8 x 4;Direct Interface with 8- or 16-bit MPU (Both of 68 and 80 type MPU can connect directly);Extension Function (can combine with NJU6570A or6451A);Read Out From the Display Data RAM;16-common and 61-segment Drivers;Programmable Duty Ratio;1/16 or 1/32 Duty.

The NJU6570A is a bit map LCD driverto display graphics or characters.It contains 2,560 bit display data RAM, microprocessor interface circuits, instruction decoder, and 16-common and 61-segment drivers.The bit image display data sent from 8- or 16-bit MPU are stored in the display data RAM and drives Dot Matrix LCD Panel by the common and segment drivers.The 16-common and 61-segment drivers can drive graphics or 12-character 2-line with icon data.The NJU6570A can combine with the NJU6570A or6451A to expand the display capacity to 32 x 122 dots or 16 x 141 dots of graphics or character display by using the extension function of NJU6570A.Furthermore, the incorporated CR oscillator required minimum external component and the wide operating voltage, low current consumption are useful apply to the small sized battery operated items.The Display Start Line Register is a pointer register which indicate the address in the Display Data RAM corresponded with COM,o (normally it display the top line in the LCD Panel).This register can use for scroll the screen, change the display page and so on.The Display Start Line instruction set the display start address of the Display Data RAM represented in 5-bit to this register.

This Generator generates the timing signal for the display system by combination of the master clock and Frame Driving Signal FR. The Frame Driving Signal FR has a function to generate the 2 frame alternative driving method waveform forthe LCD panel, and synchronizing the line counter and common timing generator to the master LSI. Therefore, the FR signal must be 50% duty ratio clock signal which synchronized with the frame signal.The NJU6570A distinguish the signal on the data bus by combination of AO and RlW(RD,WR).Normally, the busy check is not required as the NJU6570A is operating so first because of the decode of the instruction and execution are performs only depend on the internal timing which not depend on the external clock.