MOSFET P-Ch LL FET Enhancement Mode
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Transistor Polarity : | P-Channel | Drain-Source Breakdown Voltage : | - 20 V | ||
Gate-Source Breakdown Voltage : | +/- 8 V | Continuous Drain Current : | 24 A | ||
Resistance Drain-Source RDS (on) : | 0.005 Ohms | Configuration : | Single | ||
Maximum Operating Temperature : | + 175 C | Mounting Style : | Through Hole | ||
Package / Case : | TO-220AB | Packaging : | Tube |
Symbol | Parameter |
NDP6020P |
NDB6020P |
Units |
VDSS | Drain-Source Voltage |
-20 |
V | |
VGSS | Gate-Source Voltage - Continuous |
±8 |
V | |
ID | Drain Current - Continuous - Pulsed |
-24 |
A | |
-70 | ||||
PD | Total Power Dissipation @ TC = 25°C Derate above 25°C |
60 |
W | |
0.4 |
W/ | |||
TJ,TSTG | Operating and Storage Temperature Range |
-65 to 175 |
These logic level P-Channel enhancement mode power field effect transistors NDP6020P are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. NDP6020P is particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Technical/Catalog Information | NDP6020P |
Vendor | Fairchild Semiconductor |
Category | Discrete Semiconductor Products |
Mounting Type | Through Hole |
FET Polarity | P-Channel |
Drain to Source Voltage (Vdss) | 20V |
Current - Continuous Drain (Id) @ 25° C | 24A |
Rds On (Max) @ Id, Vgs | 50 mOhm @ 12A, 4.5V |
Input Capacitance (Ciss) @ Vds | 1590pF @ 10V |
Power - Max | 60W |
Packaging | Tube |
Gate Charge (Qg) @ Vgs | 35nC @ 5V |
Package / Case | TO-220 |
FET Feature | Logic Level Gate |
Lead Free Status | Lead Free |
RoHS Status | RoHS Compliant |
Other Names | NDP6020P NDP6020P |