NCP5201

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM) 3 2.0 kV per JEDEC Standard JESD22−A114 except Pin 15 which is 3 1.5 kV. Machine Model (MM) 3 200 V per JEDEC Standard JESD22−A115 except Pin 14 which is 3 100 V.
2. Latchup Current Maximum Rating: 3 150 mA per JEDEC Standard JESD78.

The NCP5201 Dual DDR Power Controller is specifically designed as a total power solution for a high current DDR memory system. This IC combines the efficiency of a PWM controller for the VDDQ supply with the simplicity of a linear regulator for the VTT memory termination voltage. The secondary regulator (VTT) is designed to automatically track at half the primary regulator voltage (VDDQ). An internal power good voltage monitor tracks both VDDQ and VTT outputs and notifies the user in the event of a fault on either output. Protective features include soft−start circuitry and undervoltage monitoring of VCC and VSTBY. The IC of the NCP5201 is packaged in a 5 × 6 QFN−18.