DescriptionThe N08L163WC2C is an integrated memory device containing a 8 Mbit static random access memory organized as 524,288 words by 16 bits.The N08L163WC2Cdevice is designed and fabricated using NanoAmp's advanced CMOS technology to provide both high-speed performance and ultra-low power. The ...
N08L163WC2C: DescriptionThe N08L163WC2C is an integrated memory device containing a 8 Mbit static random access memory organized as 524,288 words by 16 bits.The N08L163WC2Cdevice is designed and fabricated using...
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Features: • Single Wide Power Supply Range 2.2 to 3.6 Volts• Very low standby current ...
The N08L163WC2C is an integrated memory device containing a 8 Mbit static random access memory organized as 524,288 words by 16 bits.The N08L163WC2C device is designed and fabricated using NanoAmp's advanced CMOS technology to provide both high-speed performance and ultra-low power. The device operates with two chip enable(CE1 and CE2) controls and output enable (OE) to allow for easy memory expansion. Byte controls (UB and LB) allow the upper and lower bytes to be accessed independently and can also be used to deselect the device.
The N08L163WC2C has the following features including:(1)single wide power supply range; (2)very low standby current; (3)very low operating current; (4)simple memory control; (5)low voltage data retention; (6)very fast output enable access time; (7)automatic power down to standby mode; (8)TTL compatible three-state output driver; (9)ultra low power sort available.The N08L163WC2C is optimal for various applications where low-power is critical such as battery backup and hand-held devices.
The absolute maximum ratings of the N08L163WC2C are:(1)voltage on any pin relative to Vss:-0.3 to Vcc+0.3V; (2)voltage on VCC supply relative to Vss:-0.3 to 4.5V; (3)operating temperature:-40 to 85; (4)storage temperature:-60 to 150;(5)power dissipation:500mW.Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open and 8-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant bits and addressing the 16 words within the open page, power is reduced to the page mode value which is considerably lower than standard operating currents for low power SRAMs.