MX98704

Features: • Full-Duplex Operation• Generates 125-Mhz Transmit Clock and 25-Mhz SYMCLK• Converts 5-Bit Parallel Transmit Data to 1-Bit Serial Data• Converts Transmit NRZ Data to NRZI Data• Loopback and Transmitter-Off Modes• Recovers 125-MHz Clock from Incoming s...

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MX98704 Picture
SeekIC No. : 004431895 Detail

MX98704: Features: • Full-Duplex Operation• Generates 125-Mhz Transmit Clock and 25-Mhz SYMCLK• Converts 5-Bit Parallel Transmit Data to 1-Bit Serial Data• Converts Transmit NRZ Data ...

floor Price/Ceiling Price

Part Number:
MX98704
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

• Full-Duplex Operation
• Generates 125-Mhz Transmit Clock and 25-Mhz SYMCLK
• Converts 5-Bit Parallel Transmit Data to 1-Bit Serial Data
• Converts Transmit NRZ Data to NRZI Data
• Loopback and Transmitter-Off Modes
• Recovers 125-MHz Clock from Incoming serial NRZI Data Stream
• Reclocks Incoming Serial NRZI Data Stream Using Recovered Clock
• Converts Received Serial Bit Stream to 5-Bit Paralled Form
• Converts NRZI data to NRZ
• Generates 25-MHz Receive Clock
• Package type       
     -52 PLCC
     -52 PQFP



Pinout

  Connection Diagram


Specifications

Logic Power Referenced to GND ........................................-0.5V to +7.0V
Received Power Referenced to RGND ................................-0.5V to +7.0V
Transmit Power Referenced to TGND .................................-0.5V to +7.0V
ECL output Power Referenced to GND ...............................-0.5V to +0.7V
DC output current (High) ................................................................-50mA
ESD .................................................................................................2000V
Storage Temperature................................................. -6.5°C to +150°C



Description

The MX98704 (PDTR) includes the Physical Data Transmitter (PDT) and the Physical Data Receiver (PDR). The PDT converts encoded symbols into a serial NRZI data stream. The on-chip PLL generates a bit rate clock from the TCLKIN or crystal reference. The PDR uses a built-in clock recovery PLL to extract clock information from the received data stream. The recovered clock is used for serial-to-parallel data conversion.




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