MVTX2601

The MVTX2601 is a high density, low cost, high performance, non-blocking Ethernet switch chip. A single chip provides 24 ports at 10/100 Mbps, and a CPU interface for managed and unmanaged switch applications. The chip supports up to 64 K MAC addresses. The centralized shared memory architecture permits a very high performance packet forwarding rate at up to 3.57 1 M packets per second at full wire speed. The chip is optimized to provide low-cost, high-performance workgroup switching.

The Frame Buffer Memory domains utilize cost-effective, high-performance synchronous SRAM with aggregate bandwidth of 6.4 Gbps to support full wire speed on all ports simultaneously.

With delay bounded, strict priority, and/or WFQ transmission scheduling, and WRED dropping schemes, the MVTX2601 provides powerful QoS functions for various multimedia and mission-critical applications. The chip provides 4 transmission priorities and two levels of dropping precedence. Each packet is assigned a transmission priority and dropping precedence based on the VLAN priority field in a VLAN tagged frame, or the DS/TOS field, or the UDP/TCP logical port fields in IP packets. The MVTX2601 recognizes a total of 16 UDP/TCP logical ports, 8 hard-wired and 8 programmable (including one programmable range).

The MVTX2601 supports two groups of port trunking/load sharing. Each 10/100 group can contain up to 4 ports. Port trunking/load sharing can be used to group ports between interlinked switches to increase the effective network bandwidth.

In half-duplex mode, all ports support backpressure flow control to minimize the risk of losing data during long activity bursts. In full-duplex mode IEEE 802.3x flow control is provided. The MVTX2601 also supports a persystem option to enable flow control for best effort frames, even on QoS-enabled ports.

The MVTX2601 is fabricated using 0.25 micron technology. Inputs, however, are 3.3 V tolerant, and the outputs are capable of directly interfacing to LVTTL levels. The MVTX2601 is packaged in a 553-pin Ball Grid Array package.