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MTD20P06

Features: • Ultra Low RDS(on), HighCell Density, HDTMOS• Diode is Characterized for Use in Bridge Circuits• IDSS and VDS(on) Specified at Elevated Temperature• Avalanche Energy Specified• Surface Mount Package Available in 16 mm, 13inch/2500 Unit, Tape & Reel, Add...

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SeekIC No. : 004430551 Detail

MTD20P06: Features: • Ultra Low RDS(on), HighCell Density, HDTMOS• Diode is Characterized for Use in Bridge Circuits• IDSS and VDS(on) Specified at Elevated Temperature• Avalanche Ener...

MTD20P06 Data Sheet

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Part Number:
MTD20P06
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Ultra Low RDS(on), HighCell Density, HDTMOS
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Avalanche Energy Specified
• Surface Mount Package Available in 16 mm, 13inch/2500 Unit, Tape & Reel, Add T4 Suffix to Part Number


Specifications


Rating
Symbol
Value
Unit
DraintoSource Voltage
VDSS
60
Vdc
DraintoGate Voltage (RGS = 1.0 M)
VDGR
60
Vdc
GatetoSource Voltage - Continuous
GatetoSource Voltage - Nonrepetitive (tp 10 ms)
VGS
VGSM
± 15
± 20
Vdc
Vpk
Drain Current - Continuous
- Continuous @ 100°C
- Single Pulse (tp 10 s)
ID
ID
IDM
15
9.0
45
Adc

Apk
Total Power Dissipation @ 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C, when mounted to minimum recommended pad size
PD
72
0.58
1.75
Watts
W/°C
Watts
Operating and Storage Temperature Range
TJ, Tstg
55 to 150
°C
Single Pulse DraintoSource Avalanche Energy - STARTING TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc, PEAK IL =15Apk, L = 2.7mH, RG = 25)
EAS
300
mJ
Thermal Resistance - Junction to Case
- Junction to Ambient
- Junction to Ambient when mounted to minimum recommended pad size
RJC
RJA
RJA
1.73
100
71.4
°C/W

Maximum Lead Temperature for Soldering Purposes, 1/8"from Case for 10 seconds
TL
260
°C
(1) When surface mounted to an FR4 board using the minimum recommended pad size.

Designer's Data for "Worst Case" Conditions - The Designer's Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves - representing boundaries on device characteristics - are given to facilitate "worst case" design.

Designer's, EFET and HDTMOS are trademarks of Motorola Inc.
TMOS is a registered trademark of Motorola Inc.
Thermal Clad is a trademark of the Bergquist Company.


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