MT5C1001

Features:

• High Speed: 20, 25, 35, and 45
• Battery Backup: 2V data retention
• Low power standby
• Single +5V (+10%) Power Supply
• Easy memory expansion with CE\ and OE\ options.
• All inputs and outputs are TTL compatible
• Three-state output


Pinout




Specifications

Voltage on Any Input Relative to Vss................................-.5V to +7V
Voltage on Vcc Supply Relative to Vss...............................-.5V to +7V
Voltage Applied to Q............................................................-.5V to +6V
Storage Temperature......................................................-65 to +150
Power Dissipation..............................................................................1W
Short Circuit Output Current.........................................................20mA
Lead Temperature (soldering 10 seconds)....................................+260
Junction Temperature..................................................................+175


Description

The MT5C1001 employs low power, high-performance silicon-gate CMOS technology. Static design eliminates the need for external clocks or timing strobes while CMOS circuitry reduces power consumption and provides for greater reliability.

For flexibility in high-speed memory applications, ASI MT5C1001 offers chip enable (CE\) and output enable (OE\) capability. These enhancements can place the outputs in High-Z for additional flexibility in system design. Writing to these devices is accomplished when write enable (WE|) and CE\ inputs are both LOW. Reading is accomplished when WE\ remains HIGH while CE\ and OE\ go LOW. The MT5C1001 offer a reduced power standby mode when disabled. This allows system designs to achieve low standby power requirements.

The "L" version of MT5C1001 provides an approximate 50 percent reduction in CMOS standby current (I_SBC2) over the standard version.
All devices operation from a single +5V power supply and all inputs and outputs are fully TTL compatible.