MT4C4004J

The MT4C4004J is a kind of randomly accessed solid-state memory. The device contains 4,194,304 bits organized in a *4 configuration. The 1 Meg*4 DRAM MT4C4004J is unique because each CAS (CAS1 through CAS4) controls its corresponding data I/O port in conjunction with OE (that is, CAS1 controls DQ1 I/O port, CAS2 controls DQ2, CAS3 controls DQ3 and CAS4 controls DQ4).

There are some features of MT4C4004J as follows: (1)four independent CAS controls, allowing individual  manipulation to each of the four data input/output ports (DQ1 through DQ4); (2)offers a single chip solution to byte-level parity for 36-bit words when using 1 Mega*4 DRAMs for memory; (3)emulates WRITE-PER-BIT at design-in-level, with simplified timing constraints; (4)high-performance CMOS silicon-gate process; (5)single +5 V ±10% power supply; (6)low power, 3 mW standby; 225 mW active, typical; (7)all inputs, outputs and clocks are TTL-compatible; (8)1,024-cycle refresh in 16ms; (9)refresh modes: RAS ONLY, CAS-BEFORE-RAS (CBR) and HIDDEN.

What comes next is about the absolute maximum ratings of MT4C4004J: (1)voltage on any pin relative to VSS: -1 to +7 V; (2)operating temperature, TA (ambient): 0 to +70; (3)storage temperature (plastic): -55 to +150; (4)power dissipation: 1 W; (5)short circuit output current: 50 mA. Then is about the electrical characteristics and recommended DC operating conditions (VCC=5 V±10%): (1)supply voltage, VCC: 4.5 V min and 5.5 V typ; (2)input high (logic 1) voltage, all inputs, VIH: 2.4 V min and VCC+1 V max; (3)input high (logic 0) voltage, all inputs, VIL: -1.0 V min and 0.8 V max; (4)input leakage current, any input 0 VVIN6.5 V (all other pins not under test=0 V), II: -2A min and 2A max; (5)input leakage current (Q is disabled; 0 VVIN5.5 V ), IOZ: -10A min and 10A max; (6)output high voltage (IOUT=-5 mA),VOH: 2.4 V min; (7)output low voltage (IOUT=4.2 mA),VOH: 0.4 V max.