Application
Specifications
|
Symbol |
Parameter |
Pin Name |
Min. |
Max. |
Unit |
|
TA |
Ambient Operating Temperature |
|
0 |
70 |
|
|
TS |
Storage Temperature |
|
40 |
125 |
|
|
VSUP1 |
First Supply Voltage |
AHVSUP |
0.3
|
9.0 |
V |
|
VSUP2 |
Second Supply Voltage |
DVSUP |
0.3 |
6.0 |
V |
|
VSUP3 |
Third Supply Voltage |
AVSUP |
0.3 |
6.0 |
V |
|
dVSUP23 |
Voltage between AVSUP
and DVSUP |
AVSUP,DVSUP |
0.5 |
0.5 |
V |
|
PTOT |
Package Power Dissipation
PSDIP64
PSDIP52
PQFP80
PLQFP64
PMQFP44 |
AHVSUP,
DVSUP,
AVSUP |
|
1200
1300
1200
1000
9601) |
mW
mW
mW
mW
mW |
|
VIdig |
Input Voltage, all Digital Inputs |
|
0.3
|
VSUP2+ 0.3 |
V |
|
IIdig |
Input Current, all Digital Pins |
|
20
|
+20 |
mA2) |
|
VIana |
Input Voltage, all Analog Inputs |
SCn_IN_s,MONO_IN3) |
0.3
|
VSUP2+ 0.3 |
V |
|
IIana |
Input Current, all Analog Inputs |
SCn_IN_s,MONO_IN3)
|
5
|
+5 |
mA2) |
|
IOana |
Output Current, all SCART Outputs |
SC1_OUT_s3)
|
4) 5)
, |
4) 5)
, |
|
|
IOana |
Output Current, all Analog Outputs
except SCART Outputs |
DACM_s3) |
4) |
4) |
|
|
ICana |
Output Current, other pins
connected to capacitors |
CAPL_M3), AGNDC |
4) |
4) |
|
1) PLQFP64: 65 C
2) positive value means current flowing into the circuit
3) "n" means "1", "2", "3", or "4", "s" means "L" or "R", "p" means "M" or "A"
4) The analog outputs are short-circuit proof with respect to First Supply Voltage and ground.
5) Total chip power dissipation must not exceed absolute maximum rating.
Stresses beyond those listed in the "Absolute Maximum Ratings" may cause permanent damage to the device. This
is a stress rating only. Functional operation of the device at these or any other conditions beyond those indicated in
the "Recommended Operating Conditions/Characteristics" of this specification is not implied. Exposure to absolute
maximum ratings conditions for extended periods may affect device reliability.
DescriptionThe MSP34x0G single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to pro-cessed analog AF-out, is performed on a single chip.
Figure 11 shows a simplified functional block diagram of the MSP 34x0G.
This new generation of TV sound processing ICs now includes versions for processing the multichannel tele-vision sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The DBX noise reduction, or alter-natively, MICRONAS Noise Reduction (MNR) is per-formed alignment free.
Other processed standards of MSP34x0G are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo Radio standard.
Current ICs MSP34x0G have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP 34x0G has optimum stereo perfor-mance without any adjustments.
All MSP34x0G versions are pin and software down-ward-compatible to the MSP 34x0D. The MSP 34x0G further simplifies controlling software. Standard selec-tion requires a single I2C transmission only.
The MSP34x0G has built-in automatic functions: The IC is able to detect the actual sound standard automat-ically (Automatic Standard Detection). Furthermore, pilot levels and identification signals can be evaluated internally with subsequent switching between mono/stereo/bilingual; no I2C interaction is necessary (Auto-matic Sound Selection).
The ICs MSP34x0G are produced in submicron CMOS technology.
The MSP34x0G is available in the following pack-ages: PLCC68, PSDIP64, PSDIP52, PQFP80, and PLQFP64.
MSP34x0G Data Sheet
