MSM56V16160DH

Features: •Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell•2-bank*524,288-word*8-bit configuration•3.3 V power supply, ±0.3 V tolerance•Input: LVTTL compatible•Output: LVTTL compatible•Refresh: 4096 cycles/64 ms•Programmable data transfe...

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MSM56V16160DH Picture
SeekIC No. : 004428901 Detail

MSM56V16160DH: Features: •Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell•2-bank*524,288-word*8-bit configuration•3.3 V power supply, ±0.3 V tolerance•Input: LVTTL compat...

floor Price/Ceiling Price

Part Number:
MSM56V16160DH
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

•Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell
•2-bank *524,288-word * 8-bit configuration
•3.3 V power supply, ±0.3 V tolerance
•Input: LVTTL compatible
•Output: LVTTL compatible
•Refresh: 4096 cycles/64 ms
•Programmable data transfer mode
  CAS atency (1, 2, 3)
  CAS latency (2, 3)*1
  Burst length (1, 2, 4, 8, full page)
  Burst length (1, 2, 4, 8)*1
  Data scramble (sequential, interleave)*1
    1: H version only.
•CBR auto-refresh, Self-refresh capability
•Package:
  50-pin 400 mil plastic TSOP (Type II)(TSOPII50-P-400-0.80-K)   (Product : MSM56V16160D/DH-xxTS-K)
                                                                                                     xx indicates speed rank.
 


Pinout

  Connection Diagram  Connection Diagram


Specifications

Parameter
Symbol
Rating
Unit
Voltage on Any Pin Relative to VSS
VIN, VOUT
-0.5 to VCC +0.5
V
VCC Supply Voltage
VCC, VCCQ
-0.5 to 4.6
V
Storage Temperature
Tstg
-55 to 150
°C
Power Dissipation
PD*
600
mW
Short Circuit Current
IOS
50
mA
Operating Temperature
Topr
0 to 70
°C

*: Ta = 25°C




Description

The MSM56V16160DH is a 2-bank ×524,288-word × 16-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and outputs are LVTTL compatible.




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