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MSM54V16282

Features: • Single power supply: 3.3 V ±0.3 V• Full TTL compatibility• Multiport organization RAM : 256K word × 16 bits SAM : 512 word × 16 bits• Fast page mode•Write per bit• Byte write• Masked flash write• Masked block write (8 columns)• RAS ...

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SeekIC No. : 004428890 Detail

MSM54V16282: Features: • Single power supply: 3.3 V ±0.3 V• Full TTL compatibility• Multiport organization RAM : 256K word × 16 bits SAM : 512 word × 16 bits• Fast page mode•Write p...

MSM54V16282 Data Sheet

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Part Number:
MSM54V16282
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

• Single power supply: 3.3 V ±0.3 V
• Full TTL compatibility
• Multiport organization
       RAM : 256K word × 16 bits
       SAM : 512 word × 16 bits
• Fast page mode
•Write per bit
• Byte write
• Masked flash write
• Masked block write (8 columns)
• RAS only refresh
• CAS before RASrefresh
• CAS before RAS self-refresh
• Hidden refresh
• Serial read/write
• 512 tap location
• Bidirectional data transfer
• Split transfer
• Masked write transfer
• Refresh: 512 cycles/8 ms


Specifications

Parameter
Symbol
Condition
Rating
Unit
               Input Output Voltage
VT
Ta = 25°C
0.5 to 4.6
V
Output Current
IOS
Ta = 25°C
50
mA
  Power Dissipation
PD
Ta = 25°C
1
W
           Operating Temperature
Topr
-
0 to 70
°C
       Storage Temperature
Tstg
 -
65 to 150
°C

 



Description

The MSM54V16282 is a 4-Mbit CMOS multiport DRAM composed of a 262,144-word by 16-bit dynamic RAM, and a 512-word by 16-bit SAM. Its RAM and SAM operate independently and asynchronously.

MSM54V16282 supports three types of operations: random access to RAM port, high speed serial access to SAM port, and bidirectional transfer of data between any selected row in the RAM port and the SAM port. In addition to the conventional multiport DRAM operating modes, the MSM54V16282 features block write and flash write functions on the RAM port, and a split data transfer capability on the SAM port. The SAM port requires no refresh operation because it uses static CMOS flip-flops.




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