Features: • Single power supply : 5 V ±10%
• 512 Rows × 512 Columns ×12 bits
• Fast FIFO (First-In First-Out) operation
• High speed asynchronous serial access Read/write cycle time 25 ns/30 ns Access time 23 ns/25 ns
• Direct cascading capability
•Write mask function (Input enable control)
• Data skipping function (Output enable control)
• Self refresh (No refresh control is required)
• Package options:
44-pin 400 mil plastic TSOP (Type II) (TSOPII44-P-400-0.80-K) (Product : MSM5412222-xxTS-K)
40-pin 400 mil plastic SOJ (SOJ40-P-400-1.27) (Product : MSM5412222-xxJS)
xx indicates speed rank.Pinout
Specifications
|
Parameter |
Symbol |
Condition |
Rating |
Unit |
| Input Output Voltage |
VT |
at Ta = 25°C, VSS |
1.0 to 7.0 |
V |
| Output Current |
IOS |
Ta = 25°C |
50 |
mA |
| Power Dissipation |
PD |
Ta = 25°C |
1 |
W |
| Operating Temperature |
Topr |
- |
0 to 70 |
°C |
| Storage Temperature |
Tstg |
- |
55 to 150 |
°C |
DescriptionThe OKI MSM5412222 is a high performance 3-Mbit, 256K * 12-bit, Field Memory. It is especially designed for high-speed serial access applications such as HDTVs, conventional NTSC TVs,VTRs, digital movies and Multi-media systems. MSM5412222 is a FRAM for wide or low end use in general commodity TVs and VTRs exclusively. MSM5412222 is not designed for high end use in medical systems, professional graphics systems which require long term picture storage, data storage systems and others. Two or more MSM5412222s can be cascaded directly without any delay devices between them. (Cascading provides larger storage depth or a longer delay).
Each of the 12-bit planes of MSM53V1655F has separate serial write and read ports. These employ independent control clocks to support asynchronous read and write operations. Different clock rates are also supported, which allow alternate data rates between write and read data streams.
The MSM5412222 provides high speed FIFO, First-In First-Out, operation without external refreshing: MSM5412222 refreshes its DRAM storage cells automatically, so that it appears fully static to the users.
Moreover, fully static type memory cells and decoders for serial access enable the refresh free serial access operation, so that serial read and/or write control clock can be halted high or low for any duration as long as the power is on. Internal conflicts of memory access and refreshing operations are prevented by special arbitration logic.
The MSM5412222's function is simple, and similar to a digital delay device whose delay-bitlength is easily set by reset timing. The delay length, and the number of read delay clocks between write and read, is determined by externally controlled write and read reset timings.
Additional SRAM serial registers, or line buffers for the initial access of 256 ´ 12-bit enable high speed first-bit-access with no clock delay just after the write or read reset timings.
Additionally, the MSM5412222 has a write mask function or input enable function (IE), and readdata skipping function or output enable function (OE). The differences between write enable (WE) and input enable (IE), and between read enable (RE) and output enable (OE) are that WE and RE can stop serial write/read address increments, but IE and OE cannot stop the increment,when write/read clocking is continuously applied to MSM5412222. The input enable (IE) function allows the user to write into selected locations of the memory only, leaving the rest of the memory contents unchanged. This facilitates data processing to display a "picture in picture" on a TV screen.
The MSM5412222 is similar in operation and functionality to OKI 1-Mbit Field Memory MSM514222B and 2-Mbit Field Memory MSM518222. Three MSM514222Bs or one MSM514222B plus one MSM518222 can be replaced simply by one MSM5412222
MSM5412222 Data Sheet
