Features: • 65,536-wordx 18-bit configuration• Single 3.3 V power supply• Fully static operation• Operating temperature range: Ta = 0°C to 70°C• Power dissipation - Standby: 2 mA (Max.) - Operation: - 20 230 mA (Max.) - 25 210 mA (Max.) - 30 190 mA (Max.)• Acces...
MSM521218: Features: • 65,536-wordx 18-bit configuration• Single 3.3 V power supply• Fully static operation• Operating temperature range: Ta = 0°C to 70°C• Power dissipation - Sta...
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Features: · 1,048,576-word × 1-bit configuration· Single 5 V power supply, ±10% tolerance· Input :...
Features: • 1,048,576-word ´ 16-bit configuration• Single 5 V power supply, ±10%...
• 65,536-word x 18-bit configuration
• Single 3.3 V power supply
• Fully static operation
• Operating temperature range: Ta = 0°C to 70°C
• Power dissipation
- Standby: 2 mA (Max.)
- Operation:
- 20 230 mA (Max.)
- 25 210 mA (Max.)
- 30 190 mA (Max.)
• Access time:
- 20 20 ns (Max.)
- 25 25 ns (Max.)
- 30 30 ns (Max.)
• (Input/Output) LVTTL compatible
• Power-down function by chip enable signal
• 3-state output
• Lower and upper bytes can be controlled independently
• Package:
- 44-pin 400 mil plastic TSOP (Type II) (TSOPII44-P-400-0.80-K) (Product : MSM521218-xxTS-K) xx indicates speed rank.
Parameter | Symbol | Condition | Rating | Unit |
Power Supply Voltage | VCC | Ta = 25°C, for VSS | 0.5 to 4.6 | V |
Pin Voltage | VT | 0.5* to VCC + 0.5 | V | |
Power Dissipation | PD | Ta = 25°C | 1.0 | W |
Operating Temperature | Topr | - | 0 to 70 | °C |
Storage Temperature | Tstg | - | 55 to 125 | °C |
The MSM521218 is a 65,536-word by 18-bit CMOS fast static RAM featuring a single 3.3 V power supply operation and direct LVTTL input/output compatibility. Since the circuitry is completely static, external clock and refreshing operations are unnecessary, making this device very easy to use. The MSM521218 can be used in the high-speed operation of an access time 20 ns due to adopting a high-performance CMOS technology. In addition, the MSM521218 is provided with a chip enable signal (CE) suited to the power-down function, an output enable signal (OE) suited to the I/O bus line control, and a byte select signal (LB, UB) that can independently control the input/output of a lower byte and an upper byte.