Features: · Single power supply of 5 V ±10% with a built-in VBB generator· All inputs and outputs: TTL compatible· Multiport organization RAM port: 256K word ×4 bits SAM port: 512 word × 4 bits· RAM port Fast page mode, Read-modify-write CAS before RAS refresh, Hidden refresh RAS only refresh, Sta...
MSM514252A: Features: · Single power supply of 5 V ±10% with a built-in VBB generator· All inputs and outputs: TTL compatible· Multiport organization RAM port: 256K word ×4 bits SAM port: 512 word × 4 bits· RAM...
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Features: · 1,048,576-word × 1-bit configuration· Single 5 V power supply, ±10% tolerance· Input :...
Features: • 1,048,576-word ´ 16-bit configuration• Single 5 V power supply, ±10%...
· Single power supply of 5 V ±10% with a built-in VBB generator
· All inputs and outputs: TTL compatible
· Multiport organization
RAM port: 256K word ×4 bits
SAM port: 512 word × 4 bits
· RAM port
Fast page mode, Read-modify-write
CAS before RAS refresh, Hidden refresh
RAS only refresh, Standard write-per-bit
· SAM port
High speed serial
Read/Write capability
Fully static register
512 tap location
· RAM-SAM bidirectional, Read/Write/Pseudo write, Real time read transfer
· Package options:
28-pin 400 mil plastic ZIP (ZIP28-P-400-1.27) (Product : MSM514252A-xxZS)
28-pin 400 mil plastic SOJ (SOJ28-P-400-1.27) (Product : MSM514252A-xxJS)
xx indicates speed rank.
Parameter |
Symbol |
Condition |
Rating |
Unit |
Input Output Voltage |
VT |
Ta = 25 |
1.0 to 7.0 |
V |
Output Current |
IOS |
Ta = 25 |
50 |
mA |
Power Dissipation |
PD |
Ta = 25 |
1 |
W |
Operating Temperature |
Topr |
- |
0 to 70 |
|
Storage Temperature |
Tstg |
- |
55 to 150 |
The MSM514252A is an 1-Mbit CMOS multiport DRAM composed of a 262,144-word by 4-bit dynamic RAM, and a 512-word by 4-bit static serial access memory, SAM port. The RAM port and SAM port operate independently and asynchronously.
The MSM514252A supports three types of operations: random access to and from the RAM port, high speed serial access to and from the SAM port and bidirectional transfer of data between any selected row in the RAM port and the SAM port. The RAM port and the SAM port can be accessed independently except when data is being transferred between them internally.